IMX53CEC datasheet(201/204 Pages) FREESCALE

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Revision History

i.MX53xD Applications Processors for Consumer Products, Rev. 2

Freescale Semiconductor

201

Revision History

Table 121 provides a revision history for this data sheet.

Table 121. i.MX53xD Data Sheet Document Revision History

Rev.

Number

Date

Substantive Change(s)

Rev 2

05/2011

• In Table 1, "Ordering Information," on page 3, deleted the row for part number PCIMX535DVV1B,

added a row for MCIMX538DZK1C and updated the PCIMX538DZK1C row.

• Updated the note on page 6 in Section 1.2, “Features.”

• Added 167 MHz ARM specification to Table 7, "i.MX53xD Operating Ranges," on page 20.

• Modified VDD_FUSE design best practice footnote on Table 7, "i.MX53xD Operating Ranges," on

page 20.

• Changed VDD_FUSE max current to 120 mA in Table 9, "Maximal Supply Currents," on page 23.

• Deleted the last row of Table 10, "USB Interface Current Consumption," on page 25.

• Added Section 4.1.2.2, “PoP Package Thermal Resistance,” according to package design report.

• Made changes related to text, tables, and figures in Section 4.6.7, “DDR SDRAM Specific

Parameters (DDR2/LVDDR2, LPDDR2, and DDR3). Changes include adding LPDDR2 waves,

updating timings by ACCZ test results, and changing note about DDR load model.

• Removed the Standard Serial Interfaces section.

•In Table 11, "GPIO I/O DC Electrical Characteristics," on page 29, changed input current with no

pull-up/down from 250/120 nA to 2

μA, all input currents with pull-up from 0.12 μΑ to 2 μA when

Vin = OVDD, and input current with pull-down from 0.25

μA to 2 μA when Vin = 0.

•In Table 12, Table 13, and Table 14, changed input current from the nA range to 1

μA.

•In Table 15, "LVIO DC Electrical Characteristics," on page 33, changed input current with no

pull-up/down from 250/120 nA to 1

μA, all input currents with pull-up from 0.12 μΑ to 1 μA when

Vin = OVDD, and input current with pull-down from 0.25

μA to 1 μA when Vin = 0.

•In Table 16, "UHVIO DC Electrical Characteristics," on page 34, changed input current with no

pull-up/down from 300/63 nA to 1

μA, all input currents with pull-up from 0.06 μΑ to 1 μA when Vin

= OVDD, and input current with pull-down from 0.3

μA to 1 μA when Vin = 0.

• Updated keeper values in Table 11 through Table 16.

• Fixed titles of Figure 18 through Figure 26, to fit original EIM AC spec.

• Updated Figure 2, "Power Up Detailed Sequence," on page 27.

• Added Figure 27, "DTACK Write Access (DAP=0)," on page 62.

• Added Table 19, "DDR Output Driver Average Impedance," on page 38.

• Deleted the second footnote of Table 33, "CAMP Electrical Parameters (CKIH1, CKIH2)," on page

47.

• Deleted the Revision 1.0 EIM Internal Module Multiplexing table.

• Deleted the CKIL Electrical Specifications table.

• Deleted the CSPI Slave Mode Timing Parameters table .

• Updated the last paragragh of Section 4.7.8.6.1, “IPU Display Operating Signals.”

• Changed the title of the Section 4.4.2, “DDR Output Driver Average Impedance,” from “LPDDR2

I/O Output Buffer Impedance.”

• Added Section 6.3.2.2, “PoP Memory Support and Signal Cross Reference.”

• Updated Table 36, " NFC—Timing Characteristics," on page 52.

• Removed the “Differential pulse skew” row from Table 30, "AC Electrical Characteristics of LVDS

Pad," on page 45.

• Updated Table 64, "Asynchronous Display Interface Timing Parameters (Pixel Level)," on page

105.

• Updated Table 65, "Asynchronous Parallel Interface Timing Parameters (Access Level)," on page

106.

• Updated Table 101, "USB Timing Specification for Normal ULPI Mode," on page 144.

• Updated the second footnote on Table 112, "19 x 19 mm Signal Assignments, Power Rails, and

I/O," on page 154.

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