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MPC8548E Datasheet(PDF) 67 Page - Freescale Semiconductor, Inc |
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MPC8548E Datasheet(HTML) 67 Page - Freescale Semiconductor, Inc |
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67 / 143 page ![]() MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 8 Freescale Semiconductor 67 High-Speed Serial Interfaces (HSSI) output driver features 50- Ω termination resistor. It also assumes that the LVDS transmitter establishes its own common mode level without relying on the receiver or other external component. Figure 44. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only) Figure 45 shows the SerDes reference clock connection reference circuits for LVPECL type clock driver. Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with the MPC8548E SerDes reference clock input’s DC requirement, AC-coupling has to be used. Figure 45 assumes that the LVPECL clock driver’s output impedance is 50 Ω. R1 is used to DC-bias the LVPECL outputs prior to AC-coupling. Its value could be ranged from 140 to 240 Ω depending on the clock driver vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50- Ω termination resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8548E SerDes reference clock’s differential input amplitude requirement (between 200 and 800 mV differential peak). For example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference clock input amplitude is selected as 600 mV, the attenuation factor is 0.67, which requires R2 = 25 Ω. Consult a clock driver chip manufacturer to verify whether this connection scheme is compatible with a particular clock driver chip. Figure 45. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only) SD_REF_CLK SD_REF_CLK Clock Driver 100 Ω Differential PWB Trace CLK_Out CLK_Out LVDS CLK Driver Chip 10 nF 10 nF MPC8548E SerDes Refer. CLK Receiver 50 Ω 50 Ω Clock Driver SD_REF_CLK SD_REF_CLK Clock Driver 100 Ω Differential PWB Trace SerDes Refer. CLK Receiver Clock Driver CLK_Out CLK_Out LVPECL CLK Driver Chip R2 R2 MPC8548E 10 nF 10 nF CLK_Out CLK_Out R2 R2 R1 Clock Driver 50 Ω 50 Ω R1 |
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