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MAX16929HGUI Datasheet(PDF) 21 Page - Maxim Integrated Products |
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MAX16929HGUI Datasheet(HTML) 21 Page - Maxim Integrated Products |
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21 / 25 page ![]() ���������������������������������������������������������������� Maxim Integrated Products 21 MAX16929 Automotive TFT-LCD Power Supply with Boost Converter and Gate Voltage Regulators 3) Next, calculate the pole set by the transistor’s input capacitance, the transistor’s input resistance, and the base-to-emitter pullup resistor: POLE_IN IN BE IN 1 f 2 C (R /R ) = π × × where: m FE IN IN T m g h C , R 2 f g = = π gm is the transconductance of the pass transistor, and fT is the transition frequency. Both parameters can be found in the transistor’s data sheet. Because RBE is much greater than RIN, the above equation can be simplified: POLE_IN IN IN 1 f 2 C R = π × × Substituting for CIN and RIN yields: T POLE FE f f h = 4) Next, calculate the pole set by the regulator’s feed- back resistance and the capacitance between FBGL and GND (including stray capacitance): POLE_FBGL FBGL TOP BOTTOM 1 f 2 C (R /R ) = π × × where CFBGL is the capacitance between FBGL and GND and is equal to 30pF, RTOP is the upper resistor of the regulator’s feedback divider, and RBOTTOM is the lower resistor of the divider. 5) Next, calculate the zero caused by the output capaci- tor’s ESR: ZERO_ESR OUT_LR ESR 1 f 2 C R = π × × where RESR is the equivalent series resistance of COUT_LR. To ensure stability, make COUT_LR large enough so the crossover occurs well before the poles and zero calculated in steps 2 to 5. The poles in steps 3 and 4 generally occur at several MHz and using ceramic capacitors ensures the ESR zero also occurs at several MHz. Placing the crossover frequency below 500kHz is sufficient to avoid the amplifier delay pole and generally works well, unless unusual component choices or extra capacitances move one of the other poles or the zero below 1MHz. Table 4 is a list of recommended minimum output capaci- tance for the negative-gate voltage regulator and are applicable for output currents in the 10mA to 15mA range. Applications Information Power Dissipation An IC’s maximum power dissipation depends on the ther- mal resistance from the die to the ambient environment and the ambient temperature. The thermal resistance depends on the IC package, PCB copper area, other thermal mass, and airflow. More PCB copper, cooler ambient air, and more airflow increase the possible dis- sipation, while less copper or warmer air decreases the IC’s dissipation capability. The major components of power dissipation are the power dissipated in the buck converter, boost converter, positive-gate voltage regula- tor, negative-gate voltage regulator, and the 1.8V/3.3V regulator controller. Buck Converter In the buck converter, conduction and switching losses in the internal MOSFET are dominant. Estimate these losses using the following formula: PLXB ≈ [(IOUTB × √D)2 × RDS_ON(LXB)] + [0.5 × VINB × IOUTB × (tR + tF) × fSWB] where IOUTB is the output current, D is the duty cycle of the buck converter, RDS_ON(LXB) is the on-resistance of the internal high-side FET, VINB is the input voltage, (tR + tF) is the time is takes for the switch current and voltage to settle to their final values during the rising and falling transitions, and fSWB is the switching frequency of the buck converter. RDS_ON(LXB) is 180mI (typ) and (tR + tF) is 4.4ns + 4.6ns = 9ns at VINB = 12V. Table 4. Minimum Output Capacitance vs. Output Voltage Range for Negative-Gate Voltage Regulator (IOUT = 10mA to 15mA) OUTPUT VOLTAGE RANGE MINIMUM OUTPUT CAPACITANCE (µF) -2V R VGL R -4V 2.2 -5V R VGL R -7V 1.5 -8V R VGL R -13V 1 |
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