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PCA9601DP Datasheet(PDF) 6 Page - NXP Semiconductors

Part # PCA9601DP
Description  Dual bidirectional bus buffer
PDF  32 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9601DP Datasheet(HTML) 6 Page - NXP Semiconductors

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PCA9601
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 6 May 2011
6 of 32
NXP Semiconductors
PCA9601
Dual bidirectional bus buffer
7.4 Comparison of PCA9601/PCA9600 and P82B96
The PCA9601 is a direct upgrade of the P82B96 with the significant differences
summarized in Table 4. The PCA9601 provides improved interface to the higher drive
Fast-mode Plus devices on the SX/SY sides.
When the device driving the PCA9601/PCA9600 is an I2C-bus compatible device, then
the PCA9601 is an improvement on the P82B96 as shown in Table 4. There will always be
exceptions however, and if the device driving the bus buffer is not I2C-bus compatible
(e.g., you need to use the micro already in the system and bit-bang using two GPIO pins)
then here are some considerations that would point to using the P82B96 instead:
• When the pull-up must be the weakest one possible. The spec is 200 μA for P82B96,
but it typically works even below that. And if designing for a temperature range
−40 °C
up to +60
°C, then the driver when sinking 200 μA only needs to drive a guaranteed
low of 0.55 V. For the PCA9601/PCA9600, over that same temperature range and
when sinking 1.3 mA (at
−40 °C), the device driving the bus buffer must provide the
required low of 0.425 V.
• When the lower operating temperature range is restricted (say 0 °C). The P82B96
larger SX voltage levels then make a better typical match with the driver, even when
the supply is as low as 3.3 V.
For an I2C-bus compliant driver on 3.3 V the P82B96 is required to guarantee a bus
low that is below 0.83 V. P82B96 guarantees that with a 200
μA pull-up.
Table 4.
PCA9601/PCA9600 versus P82B96
Detail
PCA9601/PCA9600
P82B96
Supply voltage (VCC) range:
2.5 V to 15 V
2 V to 15 V
Maximum operating bus voltage
(independent of VCC):
15 V
15 V
Typical operating supply current:
5 mA
1 mA
Typical LOW-level input voltage on I2C-bus
(SX/SY side):
0.5 V over
−40 °C to +85 °C
0.65 V at 25
°C
LOW-level output voltage on I2C-bus
(SX/SY side; 3 mA sink):
0.74 V (max.) over
−40 °C to +85 °C 0.88 V (typ.) at 25 °C
LOW-level output voltage on Fm+ I2C-bus
(SX/SY side; 15 mA sink):
1 V (max.) over 0
°C to 85 °C
(PCA9601 only)
n/a
Temperature coefficient of VIL /VOL:0 mV/°C
−2mV/°C
Logic voltage levels on SX/SY bus
(independent of VCC):
compatible with I2C-bus and similar
buses using TTL levels (SMBus, etc.)
compatible with I2C-bus and similar
buses using TTL levels (SMBus, etc.)
Typical propagation delays:
< 100 ns
< 200 ns
TX/RX switching specifications (I2C-bus
compliant):
yes, all classes including 1 MHz Fm+ yes, all classes including Fm+
RX logic levels with tighter control than
I2C-bus limit of 30 % to 70 %:
yes, 40 % to 55 % (48 % nominal)
yes, 42 % to 58 % (50 % nominal)
Maximum bus speed:
> 1 MHz
> 400 kHz
ESD rating HBM per JESD22-A114:
> 4500 V
> 3500 V
Package:
SO8, TSSOP8 (MSOP8)
DIP8, SO8, TSSOP8 (MSOP8)



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