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SC1401 Datasheet(PDF) 2 Page - Semtech Corporation

Part # SC1401
Description  HIGH PERFORMANCE SYNCHRONOUS BUCK CONTROLLER WITH LDO FOR PORTABLE POWER
PDF  17 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC1401 Datasheet(HTML) 2 Page - Semtech Corporation

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SC1401
© 2000 SEMTECH CORP.
652 MITCHELL ROAD
NEWBURY PARK CA 91320
HIGH PERFORMANCE SYNCHRONOUS BUCK
CONTROLLER WITH LDO FOR PORTABLE
POWER
November 21, 2000
2
Note: All logic level inputs and outputs are open collector TTL compatible.
Pin #
Pin Name
Pin Function
1
SYNC
Oscillator control/synchronization input. Connect to V5V for 300kHz. Connect to
GND for 200kHz. For external clock synchronization in the 240kHz to 350kHz
range. A high-to-low transition causes a new cycle start.
2
SHDN
Logic Low shuts down the switching regulator.
3
FB
Feedback input for the SMPS. FB selects fixed 1.25V output voltage setting
when tied to VOUT. Connect FB to a resistor divider for adjustable output mode.
Refer to page 9.
4
VDD1
Supply input from battery (6V to 30V).
5
GND
Low noise analog ground and feedback reference point.
6
CSL
Inverting input to current sense amplifier. Also serves as the feedback input in
fixed output mode.
7
CSH
Non-Inverting input to current sense amplifier. Current limit level is 120mV
referenced to CSL.
8
V5V
5 volt external supply used to power the gate drives, internal control and
reference of the SC1401.
9
DL
Gate drive output for low side synchronous rectifier MOSFET.
10
PGND
Device power ground.
11
PGND
Device power ground.
12
PHASE
Inductor switching node connected to the source of high side MOSFET
and drain of low side MOSFET.
13
DH
Gate drive output for high side N-Channel MOSFET. DH is a floating driver
output driven from the floating voltage across BST to PHASE.
14
BST
Boost capacitor connection for the high side driver.
15
VDD2
Supply voltage input for the linear FET controller.
16
GATEIO
Gate drive output for the linear FET controller.
17
IOS
Sense input voltage for the adjustable voltage linear FET controller.
Refer to page 9.
18
ENABLEIO
Logic low shuts down the linear FET controller.
19
RESET
Active-Low reset output.
20
PSAVE
A logic low enables power saving mode.
PIN DESCRIPTION
 +
=
9
8
O
R
R
1
1.25
(SMPS)
V
 +
=
6
5
O
R
R
1
1.25
(Linear)
V



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