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HMC703LP4E Datasheet(PDF) 21 Page - Hittite Microwave Corporation

Part # HMC703LP4E
Description  8 GHZ FRACTIONAL SYNTHESIZER
PDF  52 Pages
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Manufacturer  HITTITE [Hittite Microwave Corporation]
Direct Link  http://www.hittite.com
Logo HITTITE - Hittite Microwave Corporation

HMC703LP4E Datasheet(HTML) 21 Page - Hittite Microwave Corporation

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HMC703LP4E
v00.0311
8 GHZ FRACTIONAL SYNTHESIZER
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: pll@hittite.com
(not accounting for any mismatch) will be 180° out of phase = ((0.7-0.2) x 360°). The user can take advantage of this
for phase control of the outputs of multiple synthesizers.
If phase control is not needed, the best spurious operation is achieved with the SEED set to a busy binary number,
for example 50F1CDh, or B29D08h.
Note that in Exact Frequency mode with an exact step of fstep, if autoseed is off, there can be a delay of up to 1/fstep
after a trigger before a new fractional frequency is recognized.
Frequency Tuning
Integer Mode
In integer mode the VCO step size is fixed to that of the PD frequency, fpd. Integer mode typically has lower phase
noise than fractional mode for a given PD operating frequency. The advantage is usually of the order of 2 to 3 dB.
Integer mode, however, often requires a lower PD frequency to meet channel step size requirements. The fractional
mode advantage is that higher PD frequencies can be used, hence lower phase noise can often be realized. “Charge
Pump Offset” should be disabled in integer mode. In integer mode the Δ∑ modulator is shut off and the N divider (Reg
03h) may be programmed to any integer value in the range 16 to 216-1. To use the HMC703LP4E in integer mode
program Reg 06h[7:5] = 1, then program the integer portion of the frequency (as per (EQ 5)), ignoring the fractional
part.
There is no double buffering in integer mode, i.e. write data then trigger the frequency change later. A write to the
NINT register (Reg 03h) immediately starts the RF frequency hop. There is no external trigger available in this mode.
If double buffering is required, use fractional mode (Reg 06h[7:5] = 0), with Nfrac (Reg 04h ) = 0, and SEED (Reg 05h)
= 0.
Fractional Mode
The HMC703LP4E is placed into fractional mode by setting SD_MODE (Reg 06h[7:5] ) = 0
The frequency of a locked VCO controlled by the HMC703LP4E, fvco, is given by
fps =
(Nint + Nfrac) = fint + ffrac
fxtal
R
(EQ 5)
fvco = k fps
(EQ 6)
Where:
fps
is the frequency at the prescalar input after any potential RF divide by 2
fvco
is the frequency at the HMC703LP4E’s RF port
k
is 1 if the RF Divide by 2 is bypassed, 2 if on (Reg 08h[17])
Nint
is the integer division ratio, Reg 03h, an integer between 20 and 216- 1
Nfrac
is the fractional part, from 0.0 to 0.99999...,Nfrac=Reg 04h/224
R
is the reference path division ratio, Reg 02h
fxtal
is the frequency of the reference oscillator input
fpd
is the PD operating frequency, fxtal/R



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