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LPC4310 Datasheet(PDF) 84 Page - NXP Semiconductors |
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LPC4310 Datasheet(HTML) 84 Page - NXP Semiconductors |
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84 / 145 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2.1 — 23 September 2011 84 of 145 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 7.19.5.1 Features • Internally resets chip if not periodically reloaded during the programmable time-out period. • Optional windowed operation requires reload to occur between a minimum and maximum time period, both programmable. • Optional warning interrupt can be generated at a programmable time prior to watchdog time-out. • Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be disabled. • Incorrect feed sequence causes reset or interrupt if enabled. • Flag to indicate watchdog reset. • Programmable 24-bit timer with internal prescaler. • Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in multiples of Tcy(WDCLK) 4. 7.20 Analog peripherals 7.20.1 Analog-to-Digital Converter (ADC0/1) 7.20.1.1 Features • 10-bit successive approximation analog to digital converter. • Input multiplexing among 8 pins. • Power-down mode. • Measurement range 0 to VDDA. • Sampling frequency up to 400 kSamples/s. • Burst conversion mode for single or multiple inputs. • Optional conversion on transition on ADCTRIG0 or ADCTRIG1 pins, combined timer outputs 8 or 15, or the PWM output MCOA2. • Individual result registers for each A/D channel to reduce interrupt overhead. • DMA support. 7.20.2 Digital-to-Analog Converter (DAC) 7.20.2.1 Features • 10-bit resolution • Integral Non-Linearity (INL) <tbd> • Differential Non-Linearity (DNL) <tbd> • Monotonic by design (resistor string architecture) • Controllable conversion speed • Low power consumption |
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