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Truth Table

Control Voltage

Bias Voltage & Current

Worst Case Step Error

Between Successive Attenuation States

Vdd = +5.0 Vdc ± 10%

Vdd

(VDC)

Idd (Typ.)

(mA)

+4.5

3.3

+5.0

3.5

+5.5

3.7

State

Bias Condition

Low

0 to +0.8V @ -5 uA Typ.

High

+2.0 to + 5.0 Vdc @ 30 uA Typ.

Note: Vdd = +5V

Control Voltage Input

Attenuation

State

RF1 - RF2

V1

4 dB

V2

2 dB

V3

1 dB

V4

0.5 dB

V5

0.25 dB

High

High

High

High

High

Reference

I.L.

High

High

High

High

Low

0.25 dB

High

High

High

Low

High

0.5 dB

High

High

Low

High

High

1 dB

High

Low

High

High

High

2 dB

Low

High

High

High

High

4 dB

Low

Low

Low

Low

Low

7.75 dB

Any combination of the above states will provide an attenuation

approximately equal to the sum of the bits selected.

-0.25

-0.15

-0.05

0.05

0.15

0.25

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

FREQUENCY (GHz)

0.25 dB LSB GaAs MMIC 5-BIT DIGITAL

POSITIVE CONTROL ATTENUATOR, DC - 4 GHz

v00.0605