HT16C23 datasheet(21/35 Pages) HOLTEK

21 / 35 page

Rev. 1.10

June 21, 2011

HT16C23/HT16C23G

Display RAM Page Write Operation

After a START condition the slave address with the R/W bit is placed on the bus followed with a command

byte and the specified display RAM Register Address of which the contents are written to the internal address

pointer. The data to be written to the memory will be transmitted next and then the internal address pointer will be

incremented by 1 to indicate the next memory address location after the reception of an acknowledge clock pulse.

After the internal address point reaches the maximum memory address, which is 1BH for 1/4 duty drive mode or

33H for 1/8 duty drive mode, the address pointer will be reset to 00H.

Slave Address

ACK

Write

ACK

2nd

ACK

Data byte

Nth data

Data byte

2nd data

ACK

Data byte

1st data

ACK

Command byte

1st

BIT0

BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

BIT0

BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

N Bytes Display RAM Data Write Operation

Display RAM Read Operation

● In this mode, the master reads the HT16C23/HT16C23G data after setting the slave address. Following the

R/W bit (=“0”) is an acknowledge bit, a command byte and the register address byte which is written to the

internal address pointer. After the start address of the Read Operation has been configured, another START

condition and the slave address transferred on the bus followed by the R/W bit (=“1”). Then the MSB of the

data which was addressed is transmitted first on the I2C bus. The address pointer is only incremented by 1 after

the reception of an acknowledge clock. That means that if the device is configured to transmit the data at the

address of AN+1, the master will read and acknowledge the transferred new data byte and the address pointer is

incremented to AN+2. After the internal address pointer reaches the maximum memory address, which is 1Bh for

1/4 duty drive mode or 33H for 1/8 duty drive mode, the address pointer will be reset to 00H.

● This cycle of reading consecutive addresses will continue until the master sends a STOP condition.

ACK

Write

ACK

Slave Address

S 0 1 1 1 1 1 0 0

Data byte

NACK

D7 D6 D5 D4 D3 D2 D1 D0

1st data

Data byte

ACK

D7 D6 D5 D4 D3 D2 D1 D0

Nth data

Data byte

D7 D6 D5 D4 D3 D2 D1 D0

2nd data

ACK

Device Address

Read

S 0 1 1 1 1 1 0 1

ACK

Command byte

1st

2nd

BIT0

BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

BIT0

BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

HT16C23 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

HT16C23 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc

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