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HT82B60R Datasheet(PDF) 15 Page - Holtek Semiconductor Inc |
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HT82B60R Datasheet(HTML) 15 Page - Holtek Semiconductor Inc |
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15 / 70 page ![]() HT82B60R Rev. 1.10 15 February 1, 2011 will in fact only read the status of the output data latch and not the actual logic status of the output pin. Pin-shared Functions The flexibility of the microcontroller range is greatly en- hanced by the use of pins that have more than one func- tion. Limited numbers of pins can force serious design constraints on designers but by supplying pins with multi-functions, many of these difficulties can be over- come. For some pins, the chosen function of the multi-function I/O pins is set by configuration options while for others the function is set by application pro- gram control. · External Interrupt Input The external interrupt pin, INT is pin-shared with the I/O pin PB5. For applications not requiring an external interrupt input, the pin-shared external interrupt pin can be used as a normal I/O pin, however to do this, the external interrupt enable bit in the INTC1 register must be disabled. · External Timer0 Clock Input The external timer pin TMR0 is pin-shared with the I/O pin PA6. To configure this pin to operate as timer input, the corresponding control bits in the timer control reg- ister must be correctly set. For applications that do not require an external timer input, this pin can be used as a normal I/O pin. Note that if used as a normal I/O pin the timer mode control bits in the timer control register must select the timer mode, which has an internal clock source, to prevent the input pin from interfering with the timer operation. · External Timer1 Clock Input The external timer pin TMR1 is pin-shared with the I/O pin PA7. To configure this pin to operate as timer input, the corresponding control bits in the timer control reg- ister must be correctly set. For applications that do not require an external timer input, this pin can be used as a normal I/O pin. Note that if used as a normal I/O pin the timer mode control bits in the timer control register must select the timer mode, which has an internal clock source, to prevent the input pin from interfering with the timer operation. External Interrupt Input The external interrupt pin INT is pin-shared with the I/O pin PB5. For applications not requiring an external inter- rupt input, the pin-shared external interrupt pin can be used as a normal I/O pin, however to do this, the exter- nal interrupt enable bits in the INTC1 register must be disabled. COM Driver Pins Pins PC0~PC3 on Port C can be used as LCD COM driver pins. This function is controlled using the LCDC register which will generate the necessary 1/2 bias sig- nals on these four pins. Serial Interface Module The device pins, PB0~PB3, are pin-shared with pins SDA, SCL, SCS, SCK, SDI, SDO. The choice of which function is used is selected using the SIMCTL0 register. I/O Pin Structures The diagram illustrates a generic I/O pin internal struc- tures. As the exact logical construction of the I/O pin will differ and as the pin-shared structures are not illustrated this diagram is supplied as a guide only to assist with the functional understanding of the I/O pins. Programming Considerations Within the user program, one of the first things to con- sider is port initialisation. After a reset, all of the data and port control register will be set high. This means that all I/O pins will default to an input state, the level of which depends on the other connected circuitry and whether pull-high options have been selected. If the PAC, PBC, V D D / V 3 3 O ( P B ) M U X W a k e - u p O p t i o n S y s t e m W a k e - u p R e a d D a t a R e g i s t e r D Q C K S D Q C K S C o n t r o l B i t D a t a B u s W r i t e C o n t r o l R e g i s t e r C h i p R e s e t R e a d C o n t r o l R e g i s t e r W r i t e D a t a R e g i s t e r D a t a B i t I / O p i n Q Q W e a k P u l l - u p P u l l - H i g h O p t i o n Input/Output Ports |
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