HT82B60R datasheet(32/70 Pages) HOLTEK

32 / 70 page

HT82B60R

Rev. 1.10

February 1, 2011

The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed and to select

the serial bus, PS2 or USB. The endpoint request flags, EP0IF, EP1IF, EP2IF and EP3IF, are used to indicate which

endpoints are accessed. If an endpoint is accessed, the related endpoint request flag will be set to

²1² and the USB in-

terrupt will occur, if the USB interrupt is enabled and the stack is not full. When the active endpoint request flag is

served, the endpoint request flag has to be cleared to

²0².

Bit No.

Label

R/W

Function

EP0_INT

R/W

When this bit is set to

²1² (set by the SIE), it indicates that endpoint 0 is accessed

and a USB interrupt will occur. When the interrupt has been served, this bit should

be cleared by firmware.

EP1_INT

R/W

When this bit is set to

²1² (set by the SIE), it indicates that endpoint 1 is accessed

and a USB interrupt will occur. When the interrupt has been served, this bit should

be cleared by firmware.

EP2_INT

R/W

When this bit is set to

²1² (set by the SIE), it indicates that endpoint 2 is accessed

and a USB interrupt will occur. When the interrupt has been served, this bit should

be cleared by firmware.

EP3_INT

R/W

When this bit is set to

²1² (set by the SIE), it indicates that endpoint 3 is accessed

and a USB interrupt will occur. When the interrupt has been served, this bit should

be cleared by firmware.

MODE_CTRL0

MODE_CTRL1

R/W

00 : Non-USB mode, turn-off V33O, both USBPDP and USBPDN can be read and

write - default

01 : Non-USB mode, has 200

W between VDD and V33O, both USBPDP and

USBPDN can be read and write

10 : USB mode, 1.5k

W between USBPDN and V33O, V33O output 3.3V,

both USBPDP and USBPDN are read only

11 : Non-USB mode, V33O output 3.3V, both USBPDP and USBPDN can be read

and write

¾¾ Reserved

USB_flag

R/W

This flag is used to indicate that the

MCUis in the USB mode - Bit=1

This bit is R/W by FW and will be cleared to

²0² after power-on reset - Default=²0²

USR (21H) Register

There is a system clock control register implemented to select the clock used in the MCU. This register consists of the

USB clock control bit, USBCKEN, and a system clock selection bit, SYSCLK. The PS2 mode indicate bit, PS2_flag,

and a system clock adjust control bit, CLK_adj.

Bit No.

Label

R/W

Function

¾¾

Reserved bit - read as

²0²

¾¾

Reserved bit - read as

²0²

D_SR

R/W

When set to

²1², a 7.5kW resistor will be connected between VDD and USBPDN, and

the 1.5k

W between USBPDN and V33O will be removed, default value is ²0².

USBCKEN R/W

USB clock control bit. When this bit is set to

²1², it indicates that the USB clock is en-

abled. Otherwise, the USB clock is turned-off (default

²0²).

BGOFF

R/W When set to

²1², the Band-gap circuit will be switched off. Default value is ²0².

PS2_flag

R/W

This flag is used to indicate that the

MCUis in the PS2 mode (Bit=1).

This bit is R/W by FW and will be cleared to

²0² after power-on reset (default ²0²).

SYSCLK

R/W

This bit is used to specify the system oscillator frequency used by the MCU. If an Inte-

grated 6MHz oscillator is used, this bit should be set to

²1². If an Integrated 12MHz os-

cillator is used, this bit should be cleared to

²0² (default).

CLK_adj

R/W

This bit is used to adjust the system clock for the USB mode for temperature changes.

In the Power-down Mode this bit should be set high to reduce power consumption.

0: enable (default)

1: disable

SCC (22H) Register

HT82B60R Datasheet(PDF) 32 Page - Holtek Semiconductor Inc

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