LPC11U2X datasheet(2/67 Pages) PHILIPS

2 / 67 page

LPC11U2X

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Preliminary data sheet

Rev. 1 — 29 November 2011

2 of 67

NXP Semiconductors

LPC11U2x

32-bit ARM Cortex-M0 microcontroller

 Digital peripherals:

 Up to 54 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down

resistors, repeater mode, and open-drain mode.

 Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources.

 Two GPIO grouped interrupt modules enable an interrupt based on a

programmable pattern of input states of a group of GPIO pins.

 High-current source output driver (20 mA) on one pin.

 High-current sink driver (20 mA) on true open-drain pins.

 Four general-purpose counter/timers with a total of up to 5 capture inputs and 13

match outputs.

 Programmable Windowed WatchDog Timer (WWDT) with a dedicated, internal

low-power WatchDog Oscillator (WDO).

 Analog peripherals:

 10-bit ADC with input multiplexing among eight pins.

 Serial interfaces:

 USB 2.0 full-speed device controller.

 USART (Universal Synchronous Asynchronous Receiver/Transmitter) with

fractional baud rate generation, internal FIFO, a full modem control handshake

interface, and support for RS-485/9-bit mode and synchronous mode. USART

supports an asynchronous smart card interface (ISO 7816-3).

 Two SSP (Synchronous Serial Port) controllers with FIFO and multi-protocol

capabilities.

 I2C-bus interface supporting the full I2C-bus specification and Fast-mode Plus with

a data rate of up to 1 Mbit/s with multiple address recognition and monitor mode.

 Clock generation:

 Crystal Oscillator with an operating range of 1 MHz to 25 MHz (system oscillator).

 12 MHz high-frequency Internal RC oscillator (IRC) that can optionally be used as

a system clock.

 Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable

frequency output.

 PLL allows CPU operation up to the maximum CPU rate with the system oscillator

or the IRC as clock sources.

 A second, dedicated PLL is provided for USB.

 Clock output function with divider that can reflect the crystal oscillator, the main

clock, the IRC, or the watchdog oscillator.

 Power control:

 Integrated PMU (Power Management Unit) to minimize power consumption during

Sleep, Deep-sleep, Power-down, and Deep power-down modes.

 Power profiles residing in boot ROM allow optimized performance and minimized

power consumption for any given application through one simple function call.

 Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep

power-down.

 Processor wake-up from Deep-sleep and Power-down modes via reset, selectable

GPIO pins, watchdog interrupt, or USB port activity.

 Processor wake-up from Deep power-down mode using one special function pin.

 Power-On Reset (POR).

 Brownout detect with four separate thresholds for interrupt and forced reset.

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