SMOMAPL138B datasheet(7/281 Pages) TI

7 / 281 page

SMOMAPL138B-HiRel

www.ti.com

SLVSAQ9 – JANUARY 2011

architecture, pipeline, instruction set, and interrupts for the TMS320C674x digital signal

processors (DSPs). The C674x DSP is an enhancement of the C64x+ and C67x+ DSPs with

added functionality and an expanded instruction set.

SPRUFK5

TMS320C674x DSP Megamodule Reference Guide. Describes the TMS320C674x digital

signal processor (DSP) megamodule. Included is a discussion on the internal direct memory

access (IDMA) controller, the interrupt controller, the power-down controller, memory

protection, bandwidth management, and the memory and cache.

SPRUFK9

TMS320C674x/OMAP-L1x Processor Peripherals Overview Reference Guide. Provides

an overview and briefly describes the peripherals available on the device.

SPRUGM7

SMOMAPL138B Applications Processor System Reference Guide .

2.2

Device Characteristics

Table 2-1 provides an overview of the device. The table shows significant features of the device, including

the capacity of on-chip RAM, peripherals, and the package type with pin count.

Table 2-1. Characteristics of SMOMAPL138B

HARDWARE FEATURES

SMOMAPL138B

DDR2, 16-bit bus width, up to 150 MHz

DDR2/mDDR Controller

Mobile DDR, 16-bit bus width, up to 133 MHz

Asynchronous (8/16-bit bus width) RAM, Flash,

EMIFA

16-bit SDRAM, NOR, NAND

Flash Card Interface

MMC and SD cards supported.

64 independent channels, 16 QDMA channels,

EDMA3

2 channel controllers, 3 transfer controllers

4 64-Bit General Purpose (each configurable as 2 separate

Timers

32-bit timers, one configurable as Watch Dog)

UART

3 (each with RTS and CTS flow control)

SPI

2 (Each with one hardware chip select)

I2C

2 (both Master/Slave)

Peripherals

Not all peripherals pins

Multichannel Audio Serial Port [McASP]

1 (each with transmit/receive, FIFO buffer, 16 serializers)

are available at the

Multichannel Buffered Serial Port [McBSP]

2 (each with transmit/receive, FIFO buffer, 16)

same time (for more

detail, see the Device

10/100 Ethernet MAC with Management Data I/O

1 (MII or RMII Interface)

Configurations section).

4 Single Edge, 4 Dual Edge Symmetric, or

eHRPWM

2 Dual Edge Asymmetric Outputs

eCAP

3 32-bit capture inputs or 3 32-bit auxiliary PWM outputs

USB 2.0 (USB0)

High-Speed OTG Controller with on-chip OTG PHY

USB 1.1 (USB1)

Full-Speed OHCI (as host) with on-chip PHY

General-Purpose Input/Output Port

9 banks of 16-bit

LCD Controller

SATA Controller

1 (Support both SATA I and SATAII)

Universal Parallel Port (uPP)

Video Port Interface (VPIF)

1 (video in and video out)

PRU Subsystem (PRUSS)

2 Programmable PRU Cores

Device Overview

Submit Documentation Feedback

Product Folder Link(s): SMOMAPL138B-HiRel

SMOMAPL138B Datasheet(PDF) 7 Page - Texas Instruments

SMOMAPL138B Datasheet(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL