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ADC1212D Datasheet(PDF) 13 Page - NXP Semiconductors |
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ADC1212D Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 42 page  ADC1212D_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 4 March 2011 13 of 42 NXP Semiconductors ADC1212D series Dual 12-bit ADC: CMOS or LVDS DDR digital outputs tclk =1/fclk Fig 4. CMOS mode timing tclk =1/fclk Fig 5. LVDS DDR mode timing (N − 12) td(s) tclk N N + 1 N + 2 tclk tsu tPD th tPD CLKP CLKM DATA DAV 005aaa060 (N − 11) (N − 13) (N − 14) 005aaa114 (N − 14) td(s) tclk N N + 1 N + 2 CLKP CLKM DAVP DAVM tPD (N − 11) (N − 12) (N − 13) DAx/ DBx DAx/ DBx DAx/ DBx DAx/ DBx DAx+1/ DBx+1 DAx+1/ DBx+1 DAx+1/ DBx+1 DAx+1/ DBx+1 DAx+1/ DBx+1 DAx_DAx + 1_P/ DBx_DBx + 1_P DAx_DAx + 1_M/ DBx_DBx + 1_M DAx/ DBx tPD tclk th tsu th tsu |
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