ADC1212D datasheet(21/42 Pages) PHILIPS

21 / 42 page

ADC1212D_SER

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 4 March 2011

21 of 42

NXP Semiconductors

ADC1212D series

Dual 12-bit ADC: CMOS or LVDS DDR digital outputs

If bit INTREF_EN is set to logic 0, the reference voltage is determined either internally or

externally as detailed in Table 12.

[1]

The voltage on pin VREF is doubled internally to generate the internal reference voltage.

Figure 21 to Figure 24 illustrate how to connect the SENSE and VREF pins to select the

required reference voltage source.

Fig 20. Reference equivalent schematic

Table 12.

Reference selection

Selection

SPI bit

INTREF_EN

SENSE pin

VREF pin

Full-scale

(V (p-p))

Internal

(Figure 21)

AGND

330 pF capacitor to

AGND

2 V

Internal

(Figure 22)

pin VREF connected to pin SENSE and

via a 330 pF capacitor to AGND

1 V

External

(Figure 23)

0VDDA

external voltage between

0.5V and 1V[1]

1 V to 2 V

Internal via SPI

(Figure 24)

pin VREF connected to pin SENSE and

via 330 pF capacitor to AGND

1 V to 2 V

EXT_ref

001aan670

REFAT/

REFBT

REFAB/

REFBB

SENSE

VREF

SELECTION

LOGIC

BANDGAP

REFERENCE

ADC CORE

BUFFER

REFERENCE

AMP

ADC1212D Datasheet(PDF) 21 Page - NXP Semiconductors

ADC1212D Datasheet(HTML) 21 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Datasheet Download

Link URL