ICS8624I

8624BYI

www.idt.com

REV. C JULY 30, 2010

8

C11

0.01u

(U1-16)

CLK_SEL

(U1-17)

Zo = 50 Ohm

SEL1

(U1-32)

R4A

50

DIV_SEL[1:0] = 01

VDD

C4

0.1uF

Zo = 50 Ohm

R9

50

VDD=3.3V

CLK_SEL

R4B

50

C2

0.1uF

RU5

SP

VDDO=1.8V

SEL1

C7

0.1uF

VDDA

R2A

50

C1

0.1uF

RU3

1K

(U1-25)

(155.5 MHz)

VDD

R10

50

Zo = 50 Ohm

RD2

1K

R7

10

C16

10u

SP = Space (i.e. not intstalled)

R2B

50

Zo = 50 Ohm

Bypass capacitor located near the power pins

VDDO

RD4

SP

155.5 MHz

SEL0

C6

0.1uF

PLL_SEL

3.3V

RU4

1K

VDD

LVHSTL_input

+

-

VDD

R8

50

(U1-24)

SEL0

RD5

1K

U1

8624

1

2

3

4

5

6

7

8

17

18

19

20

21

22

23

24

SEL0

SEL1

CLK0

nCLK0

CLK1

nCLK2

CLK_SEL

MR

VDDO

nQ1

Q1

nQ2

Q2

nQ3

Q3

VDDO

VDDO

RU2

SP

RD3

SP

(U1-9)

3.3V PECL Driver

C5

0.1uF

The schematic of the ICS8624I layout example is shown in

Figure 3A. The ICS8624I recommended PCB board layout for

this example is shown in

Figure 3B. This layout example is

used as a general guideline. The layout in the actual system

will depend on the selected component types, the density of

the components, the density of the traces, and the stack up

of the P.C. board.

For applications not requiring the use of the differential input,

both CLK and nCLK can be left floating. Though not required,

but for additional protection, a 1k

Ω resistor can be tied from

CLK to ground.

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

All unused HSTL outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential

output pair should either be left floating or terminated.