AFS090 datasheet(215/334 Pages) MICROSEMI

215 / 334 page

Fusion Family of Mixed Signal FPGAs

R e visio n 2

2 - 199

3.3 V PCI, 3.3 V PCI-X

The Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI

Bus applications.

AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable

path characterization are described in Figure 2-121.

AC loadings are defined per PCI/PCI-X specifications for the data path; Microsemi loading for tristate is

described in Table 2-135.

Table 2-134 • Minimum and Maximum DC Input and Output Levels

3.3 V PCI/PCI-X

VIL

VIH

VOL

VOH

IOL

IOH

IOSL

IOSH

IIL1

IIH2

Drive Strength

Min.

Max.

Min.

Max.

Min.

VmA

Max.

mA3

Max.

mA3

µA4

Per PCI

specification

Per PCI curves

Notes:

1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.

2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is

larger when operating outside recommended ranges.

3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.

4. Currents are measured at 85°C junction temperature.

Figure 2-121 • AC Loading

Test Point

Enable Path

R = 1 k

Test Point

Data Path

R = 25

R to VCCI for tDP (F)

R to GND for tDP (R)

R to VCCI for tLZ / tZL / tZLS

R to GND for tHZ / tZH / tZHS

10 pF for tZH / tZHS / tZL / tZLS

10 pF for tHZ / tLZ

Table 2-135 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

VREF (typ.) (V)

CLOAD (pF)

3.3

0.285 * VCCI for tDP(R)

0.615 * VCCI for tDP(F)

–10

Note:

*Measuring point = Vtrip. See Table 2-90 on page 2-168 for a complete table of trip points.

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