SC401B datasheet(26/32 Pages) SEMTECH

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SC401B

Applications Information (continued)

When the system is using ceramic output capacitors, the

ESR value is normally too small to meet the above ESR cri-

teria. As a result, the feedback voltage ripple is 180

degrees from the phase node and behaves in an unstable

manner. In this application it is necessary to add a small

virtual ESR network that is composed of two capacitors

and one resistor, as shown in Figure 13.

COUT

DCR

D x VIN

Figure 13 — Virtual ESR Ramp Circuit

The ripple voltage at FB is a superposition of two voltage

sources: the voltage across C

L and the output ripple

voltage. They are defined in the following equations.

)

DCR

(

DCR

OUT

Figure 14 shows the magnitude of the ripple contribution

due to C

L at the FB pin.

DCR

D x VIN

Figure 14 — FB Voltage by CL Voltage

It is shown by the following equation.

VFBc

Figure 15 shows the magnitude of the ripple contribution

due to the output voltage ripple at the FB pin.

COUT

DCR

VOUT

COUT

Figure 15 — FB Voltage by Output Voltage

It is shown by the following equation.

OUT

VFB

The purpose of this network is to couple the inductor

current ripple information into the feedback voltage such

that the feedback voltage has 90 degrees phase lag to the

switching node similar to the case of using standard high

ESR capacitors. This is illustrated in Figure 16.

VOUT

FB contribution

by CL

FB contribution by

output voltage ripple

Combined FB

Figure 16 — FB voltage in Phasor Diagram

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