TSL2571

LIGHT-TO-DIGITAL CONVERTER

TAOS117A − FEBRUARY 2011

14

r

r

Copyright

E 2011, TAOS Inc.

The LUMENOLOGY

r Company

www.taosinc.com

Enable Register (0x00)

The ENABLE register is used to power the device on/off, enable functions, and interrupts.

Table 3. Enable Register

6

75

4

PON

2

31

0

ENABLE

Reserved

AIEN

Address

0x00

AEN

WEN

Reserved

FIELD

BITS

DESCRIPTION

Reserved

7:5

Reserved. Write as 0.

AIEN

4

ALS interrupt mask. When asserted, permits ALS interrupts to be generated.

WEN

3

Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the

wait timer.

Reserved

2

Reserved. Write as 0.

AEN

1

ALS Enable. Writing a 1 activates the ALS. Writing a 0 disables the ALS.

0

Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate.

Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.

NOTE 1: A minimum interval of 2.72 ms must pass after PON is asserted before ALS can be initiated. This required time is enforced by the

hardware in cases where the firmware does not provide it.

ALS Timing Register (0x01)

The ALS timing register controls the internal integration time of the ALS ADCs in 2.72-ms increments.

Table 4. ALS Timing Register

FIELD

BITS

DESCRIPTION

ATIME

7:0

VALUE

INTEG_CYCLES

TIME

MAX COUNT

0xFF

1

2.72 ms

1024

0xF6

10

27.2 ms

10240

0xDB

37

101 ms

37888

0xC0

64

174 ms

65535

0x00

256

696 ms

65535