TSL2571

LIGHT-TO-DIGITAL CONVERTER

TAOS117A − FEBRUARY 2011

16

r

r

Copyright

E 2011, TAOS Inc.

The LUMENOLOGY

r Company

www.taosinc.com

Persistence Register (0x0C)

The persistence register controls the filtering interrupt capabilities of the device. Configurable filtering is

provided to allow interrupts to be generated after each ADC integration cycle or if the ADC integration has

produced a result that is outside of the values specified by threshold register for some specified amount of time.

ALS interrupts are generated using C0DATA.

Table 7. Persistence Register

6

75

4

APERS

2

31

0

PERS

Reserved

Address

0x0C

FIELD

BITS

DESCRIPTION

Reserved

7:4

Reserved

APERS

3:0

Interrupt persistence. Controls rate of interrupt to the host processor.

FIELD VALUE

MEANING

INTERRUPT PERSISTENCE FUNCTION

0000

Every

Every ALS cycle generates an interrupt

0001

1

1 value outside of threshold range

0010

2

2 consecutive values out of range

0011

3

3 consecutive values out of range

0100

5

5 consecutive values out of range

0101

10

10 consecutive values out of range

0110

15

15 consecutive values out of range

0111

20

20 consecutive values out of range

1000

25

25 consecutive values out of range

1001

30

30 consecutive values out of range

1010

35

35 consecutive values out of range

1011

40

40 consecutive values out of range

1100

45

45 consecutive values out of range

1101

50

50 consecutive values out of range

1110

55

55 consecutive values out of range

1111

60

60 consecutive values out of range

Configuration Register (0x0D)

The configuration register sets the wait long time.

Table 8.

6

75

4

2

31

0

CONFIG

Reserved

WLONG

Address

0x0D

Reserved

FIELD

BITS

DESCRIPTION

Reserved

7:2

Reserved. Write as 0.

WLONG

1

Wait Long. When asserted, the wait cycles are increased by a factor 12

WTIME register.

Reserved

0

Reserved. Write as 0.