PEF2015 datasheet(26/84 Pages) SIEMENS

26 / 84 page

PEF 2015

Operational Description

Semiconductor Group

12.97

The "pre-processed channel" option must always be applied to two consecutive time

slots. The first of these time slots must have an even time slot number. If two time-slots

are declared as "pre-processed channels", the first one can be accessed by the monitor/

feature control handler, which gives access to the frame via a 16-byte FIFO. Although

this function is mainly intended for IOM- or SLD-applications, it could also be used to

transmit or receive a "burst" of data to or from a 64-kbit/s channel. The second pre-

processed time slot, the odd one, is also accessed by the

µP. In downstream direction a

4-, 6- or 8-bit static value can be transmitted. In upstream direction the received 8-bit

value can be read. Additionally, a change detection mechanism will generate an interrupt

upon a change in any of the selected 4, 6 or 8 bits.

Pre-processed channels are usually programmed after Control Memory (CM) reset

during device initialization. Resetting the CM sets all CFI time slots to unassigned

channels (CM code '0000'). Of course, pre-processed channels can also be initialized or

re-initialized in the operational phase of the device.

To program a pair of pre-processed channels the correct code for the selected handling

scheme must be written to the CM. Figure 9 gives an overview of the available pre-

processing codes and their application. For further detail, please refer to chapter 5.5 of

the EPIC User’s Manual 02.97.

PEF2015 Datasheet(PDF) 26 Page - Siemens Semiconductor Group