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DM8603EP Datasheet(PDF) 19 Page - Davicom Semiconductor, Inc. |
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DM8603EP Datasheet(HTML) 19 Page - Davicom Semiconductor, Inc. |
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19 / 107 page ![]() DM8603 10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface Preliminary datasheet 19 DM8603-12-DS-P01 November 8, 2010 6.4 PHY ID Identifier Register 1 (042h, 062h) PHY_ADR REG_ADR ABS_ADR 02h, 03h 02h 042h, 062h Bit Bit Name Default Description 15:0 OUI_MSB RO 0181h OUI Most Significant Bits This register stores bit 3 to 18 of the OUI (00606E) to bit 15 to 0 of this register respectively. The most significant two bits of the OUI are ignored (the IEEE standard refers to these as bit 1 and 2) The PHY Identifier Registers #1 and #2 work together in a single identifier of the DM8603. The Identifier consists of a concatenation of the Organizationally Unique Identifier (OUI), a vendor's model number, and a model revision number. DAVICOM Semiconductor's IEEE assigned OUI is 00606E. 6.5 PHY ID Identifier Register 2 (043h, 063h) PHY_ADR REG_ADR ABS_ADR 02h, 03h 03h 043h, 063h Bit Bit Name Default Description 15:10 OUI_LSB RO/P 101110b OUI Least Significant Bits Bit 19 to 24 of the OUI (00606E) are mapped to bit 15 to 10 of this register respectively 9:4 VNDR_MDL RO/P 001011b Vendor Model Number Five bits of vendor model number mapped to bit 9 to 4 (most significant bit to bit 9) 3:0 MDL_REV RO/P 0001b Model Revision Number Five bits of vendor model revision number mapped to bit 3 to 0 (most significant bit to bit 4) |
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