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LTC2159 Datasheet(PDF) 26 Page - Linear Technology |
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LTC2159 Datasheet(HTML) 26 Page - Linear Technology |
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26 / 32 page ![]() LTC2159 26 2159f GROUNDING AND BYPASSING The LTC2159 requires a printed circuit board with a clean unbroken ground plane in the first layer beneath the ADC. A multilayer board with an internal ground plane is rec- ommended. Layout for the printed circuit board should ensure that digital and analog signal lines are separated as much as possible. In particular, care should be taken not to run any digital track alongside an analog signal track or underneath the ADC. High quality ceramic bypass capacitors should be used at the VDD, OVDD, VCM, VREF, REFH and REFL pins. Bypass capacitors must be located as close to the pins as pos- sible.Size0402ceramiccapacitorsarerecommended.The traces connecting the pins and bypass capacitors must be kept short and should be made as wide as possible. applicaTions inForMaTion Of particular importance is the capacitor between REFH and REFL. This capacitor should be on the same side of the circuit board as the A/D, and as close to the device as possible. The analog inputs, encode signals, and digital outputs should not be routed next to each other. Ground fill and grounded vias should be used as barriers to isolate these signals from each other. HEAT TRANSFER Most of the heat generated by the LTC2159 is transferred from the die through the bottom-side exposed pad and package leads onto the printed circuit board. For good electrical and thermal performance, the exposed pad must be soldered to a large grounded pad on the PC board. This pad should be connected to the internal ground planes by an array of vias. |
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