LTC2159

25

2159f

Bit 2

OUTOFF

Output Disable Bit

0 = Digital outputs are enabled.

1 = Digital outputs are disabled and have high output impedance.

Note: If the digital outputs are disabled the part should also be put in sleep mode or nap mode.

Bits 1-0

OUTMODE1: OUTMODE0

Digital Output Mode Control Bits

00 = Full Rate CMOS Output Mode

01 = Double Data Rate LVDS Output Mode

10 = Double Data Rate CMOS Output Mode

11 = Not Used

REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h)

D7

D6

D5

D4

D3

D2

D1

D0

X

X

OUTTEST2

OUTTEST1

OUTTEST0

ABP

RAND

TWOSCOMP

Bits 7-6

Unused, Don’t Care Bits

Bits 5-3

OUTTEST2: OUTTEST0

Digital Output Test Pattern Bits

000 = Digital Output Test Patterns Off

001 = All Digital Outputs = 0

011 = All Digital Outputs = 1

101 = Checkerboard Output Pattern. OF, D15-D0 alternate between 1 0101 0101 0101 0101 and 0 1010 1010 1010 1010.

111 = Alternating Output Pattern. OF, D15-D0 alternate between 0 0000 0000 0000 0000 and 1 1111 1111 1111 1111.

Note: Other bit combinations are not used.

Bit 2

ABP

Alternate Bit Polarity Mode Control Bit

0 = Alternate Bit Polarity Mode Off

1 = Alternate Bit Polarity Mode On. Forces the output format to be Offset Binary.

Bit 1

RAND

Data Output Randomizer Mode Control Bit

0 = Data Output Randomizer Mode Off

1 = Data Output Randomizer Mode On

Bits 0

TWOSCOMP

Two’s Complement Mode Control Bit

0 = Offset Binary Data Format

1 = Two’s Complement Data Format

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