EDE5108AHSE datasheet(21/81 Pages) ELPIDA

21 / 81 page

EDE5108AHSE, EDE5116AHSE

Preliminary Data Sheet E0908E40 (Ver. 4.0)

6. tJIT (cc) is defined as the absolute difference in clock period between two consecutive clock cycles:

tJIT (cc) = Max. of |tCKj+1

− tCKj|

tJIT (cc) is defines the cycle to cycle jitter when the DLL is already locked. tJIT (cc, lck) uses the same

definition for cycle to cycle jitter, during the DLL locking period only. tJIT (cc) and tJIT (cc, lck) are not

subject to production test.

7. tERR (nper) is defined as the cumulative error across multiple consecutive cycles from tCK (avg).

tERR (nper) is not subject to production test.

))

(

)

(

avg

tCK

tCKj

nper

tERR

−

⎭

⎬

⎫

⎩

⎨

⎧

∑

≤ n ≤ 50 for tERR (nper)

8. These parameters are specified per their average values, however it is understood that the following

relationship between the average timing and the absolute instantaneous timing hold at all times.

(minimum and maximum of spec values are to be used for calculations in the table below.)

Parameter

Symbol

min.

max.

Unit

Absolute clock period

tCK (abs)

tCK (avg) min. + tJIT (per) min.

tCK (avg) max. + tJIT (per) max. ps

Absolute clock high pulse

width

tCH (abs)

tCH (avg) min.

× tCK (avg) min. +

tJIT (duty) min.

tCH (avg) max.

× tCK (avg) max.

+ tJIT (duty) max.

Absolute clock low pulse

width

tCL (abs)

tCL (avg) min.

× tCK (avg) min. +

tJIT (duty) min.

tCL (avg) max.

× tCK (avg) max.

+ tJIT (duty) max.

Example: For DDR2-667, tCH(abs) min. = ( 0.48

× 3000 ps ) - 125ps = 1315ps

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