MAXQ613 datasheet(14/28 Pages) MAXIM

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16-Bit Microcontroller with Infrared Module

Carrier Generation Module

The IRCAH byte defines the carrier high time in terms of

the number of IR input clocks, whereas the IRCAL byte

defines the carrier low time.

• IR Input Clock (fIRCLK) = fSYS/2IRDIV[2:0]

• Carrier Frequency (fCARRIER) = fIRCLK/(IRCAH +

IRCAL + 2)

• Carrier High Time = IRCAH + 1

• Carrier Low Time = IRCAL + 1

• Carrier Duty Cycle = (IRCAH + 1)/(IRCAH + IRCAL + 2)

During transmission, the IRCA register is latched for

each IRV down-count interval, and is sampled along with

the IRTXPOL and IRDATA bits at the beginning of each

new IRV down-count interval so that duty-cycle variation

and frequency shifting is possible from one interval to the

next, which is illustrated in Figure 1.

Figure 2 illustrates the basic carrier generation and its

path to the IRTX output pin. The IR transmit polarity bit

(IRTXPOL) defines the starting/idle state and the carrier

polarity of the IRTX pin when the IR timer is enabled.

IR Transmission

During IR transmission (IRMODE = 1), the carrier gen-

erator creates the appropriate carrier waveform, while

the carrier modulator performs the modulation. The car-

rier modulation can be performed as a function of carrier

cycles or IRCLK cycles dependent on the setting of the

IRCFME bit. When IRCFME = 0, the IRV down counter is

clocked by the carrier frequency and thus the modula-

tion is a function of carrier cycles. When IRCFME = 1, the

IRV down counter is clocked by IRCLK, allowing carrier

modulation timing with IRCLK resolution.

The IRTXPOL bit defines the starting/idle state as well as

the carrier polarity for the IRTX pin. If IRTXPOL = 1, the

Figure 1. IR Transmit Frequency Shifting Example (IRCFME = 0)

CARRIER OUTPUT

(IRV)

IRDATA

IR INTERRUPT

IRMT = 3

IRTX

IRTXPOL = 1

IRTX

IRTXPOL = 0

IRCA

IRMT

IRMT = 5

IRCA = 0202h

IRCA = 0002h

IRCA, IRMT, IRDATA SAMPLED AT END OF IRV

DOWN-COUNT INTERVAL

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