DE-

MUX

DA[9:0]

DB[9:0]

MODE

GSET

Latch A

Latch B

10−b DAC

10−b DAC

IOUTA1

IOUTA2

IOUTB1

IOUTB2

1.2 V Reference

WRTB

WRTA

CLKB

CLKA

BIASJ_A

BIASJ_B

EXTIO

DVDD

DGND

AVDD

AGND

SLEEP

DAC5652A

SLAS535D – SEPTEMBER 2007 – REVISED AUGUST 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

FUNCTIONAL BLOCK DIAGRAM

AVAILABLE OPTIONS

PACKAGED DEVICES

48-Pin TQFP

DAC5652AIPFB

–40°C to 85°C

DAC5652AIPFBR

THERMAL INFORMATION

DAC5652A

UNITS

PFB (48 PINS)

Junction-to-ambient thermal resistance

65.3

Junction-to-case (top) thermal resistance

16.4

Junction-to-board thermal resistance

28.6

°C/W

Junction-to-top characterization parameter

0.4

Junction-to-board characterization parameter

28.4

Junction-to-case (bottom) thermal resistance

n/a

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

2

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