MCP1754S datasheet(16/42 Pages) MICROCHIP

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MCP1754/MCP1754S

DS22276A-page 16

3.4

Shutdown Input (SHDN)

The SHDN input is used to turn the LDO output voltage

on and off. When the SHDN input is at a logic-high

level, the LDO output voltage is enabled. When the

SHDN input is pulled to a logic-low level, the LDO

output voltage is disabled. When the SHDN input is

pulled low, the PWRGD output also goes low and the

LDO enters a low quiescent current shutdown state.

3.5

Power Good Output (PWRGD)

For fixed applications, the PWRGD output is an open-

drain output used to indicate when the LDO output

voltage is within 92% (typically) of its nominal

regulation value. The PWRGD threshold has a typical

hysteresis value of 2%. The PWRGD output is delayed

by 100 µs (typical) from the time the LDO output is

within 92% + 2% (typical hysteresis) of the regulated

output value on power-up. This delay time is internally

fixed. The PWRGD pin may be pulled up to VIN or

VOUT. Pulling up to VOUT conserves power when the

device is in shutdown (/SHDN = 0V) mode.

3.6

Exposed Pad (EP)

Some of the packages have an exposed metal pad on

the bottom of the package. The exposed metal pad

gives the device better thermal characteristics by

providing a good thermal path to either the PCB or heat

sink to remove heat from the device. The exposed pad

of the package is internally connected to GND.

MCP1754S Datasheet(PDF) 16 Page - Microchip Technology