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TMS320TCI100QGLZ Datasheet(PDF) 51 Page - Texas Instruments |
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TMS320TCI100QGLZ Datasheet(HTML) 51 Page - Texas Instruments |
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51 / 137 page  TMS320TCI100Q FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS251E − JUNE 2004 − REVISED JUNE 2006 51 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Terminal Functions (Continued) SIGNAL TYPE† IPD/ ‡ DESCRIPTION NAME NO. TYPE† IPD/ IPU‡ DESCRIPTION MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1) CLKS1/ URADDR3§ AC8 I McBSP1 external clock source (as opposed to internal) (I) [default] or UTOPIA receive address 3 pin (I) CLKR1/ URADDR2§ AC10 I/O/Z McBSP1 receive clock (I/O/Z) [default] or UTOPIA receive address 2 pin (I) CLKX1/ URADDR4§ AB12 I/O/Z McBSP1 transmit clock (I/O/Z) [default] or UTOPIA receive address 4 pin (I) DR1/ UXADDR1§ AF11 I McBSP1 receive data (I) [default] or UTOPIA transmit address 1 pin (I) DX1/ UXADDR4§ AB11 I/O/Z McBSP1 transmit data (O/Z) [default] or UTOPIA transmit address 4 pin (I) FSR1/ UXADDR2§ AC9 I/O/Z McBSP1 receive frame sync (I/O/Z) [default] or UTOPIA transmit address 2 pin (I) FSX1/ UXADDR3§ AB13 I/O/Z McBSP1 transmit frame sync (I/O/Z) [default] or UTOPIA transmit address 3 pin (I) MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0) CLKS0 F4 I IPD McBSP0 external clock source (as opposed to internal) CLKR0 D1 I/O/Z IPD McBSP0 receive clock CLKX0 E1 I/O/Z IPD McBSP0 transmit clock DR0 D2 I IPU McBSP0 receive data DX0 E2 O/Z IPU McBSP0 transmit data FSR0 C1 I/O/Z IPD McBSP0 receive frame sync FSX0 E3 I/O/Z IPD McBSP0 transmit frame sync TIMER 2 TOUT2 A4 O/Z IPD Timer 2 or general-purpose output TINP2 C5 I IPD Timer 2 or general-purpose input TIMER 1 TOUT1 B5 O/Z IPD Timer 1 or general-purpose output TINP1 A5 I IPD Timer 1 or general-purpose input TIMER 0 TOUT0 D6 O/Z IPD Timer 0 or general-purpose output TINP0 C6 I IPD Timer 0 or general-purpose input † I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground ‡ IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal to the opposite supply rail, a 1-k Ω resistor should be used.) § These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet. |
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