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TM4EP64DPN Datasheet(PDF) 13 Page - Texas Instruments |
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TM4EP64DPN Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 43 page  TM2EP64DPN, TM2EP64DJN, TM4EP64DPN, TM4EP64DJN TM2EP72DPN, TM2EP72DJN, TM4EP72DPN, TM4EP72DJN EXTENDEDDATAOUT DYNAMIC RAM MODULES SMMS684A − AUGUST 1997 − REVISED FEBRUARY 1998 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 ac timing requirements ’xEP64DxN-50 ’xEP72DxN-50 ’xEP64DxN-60 ’xEP72DxN-60 ’xEP64DxN-70 ’xEP72DxN-70 UNIT MIN MAX MIN MAX MIN MAX UNIT tRC Cycle time, random read or write 84 104 124 ns tRWC Cycle time, read-write 111 135 160 ns tRASP Pulse duration, RASx active, fast page mode (see Note 6) 50 100 000 60 100 000 70 100 000 ns tRAS Pulse duration, RASx active, non-page mode (see Note 6) 50 10 000 60 10 000 70 10 000 ns tRP Pulse duration, RASx precharge 30 40 50 ns tWP Pulse duration, write command 8 10 10 ns tRASS Pulse duration, RASx active, self refresh (see Note 7) 100 100 100 ms tRPS Pulse duration, RASx precharge after self refresh 90 110 130 ns tASC Setup time, column address 0 0 0 ns tASR Setup time, row address 0 0 0 ns tDS Setup time, data in (see Note 8) 0 0 0 ns tRCS Setup time, read command 0 0 0 ns tCWL Setup time, write command before CASx precharge 8 10 12 ns tRWL Setup time, write command before RASx precharge 8 10 12 ns tWCS Setup time, write command before CASx active (early-write only) 0 0 0 ns tWRP Setup time, WEx high before RASx low (CBR refresh only) 10 10 10 ns tCSR Setup time, CASx referenced to RASx ( CBR refresh only ) 5 5 5 ns tCAH Hold time, column address 8 10 12 ns tDH Hold time, data in (see Note 8) 8 10 12 ns tRAH Hold time, row address 8 10 10 ns tRCH Hold time, read command referenced to CASx (see Note 9) 0 0 0 ns tRRH Hold time, read command referenced to RASx (see Note 9) 0 0 0 ns tWCH Hold time, write command during CASx active ( early-write only ) 8 10 12 ns tROH Hold time, RASx referenced to OEx 8 10 10 ns tWRH Hold time, WEx high after RASx low (CBR refresh only) 10 10 10 ns tCHR Hold time, CASx referenced to RASx ( CBR refresh only ) 10 10 10 ns tOEH Hold time, OEx command 13 15 18 ns tRHCP Hold time, RASx active from CASx precharge 28 35 40 ns tCHS Hold time, CASx referenced to RASx (self refresh only) − 50 − 50 − 50 ns tAWD Delay time, column address to write command ( read-write only ) 42 49 57 ns tCRP Delay time, CASx precharge to RASx 5 5 5 ns NOTES: 6. In a read-write cycle, tRWD and tRWL must be observed. 7. During the period of 10 µs ≤ tRASS ≤100 µs, the device is in a transition state from normal-operation mode to self-refresh mode. 8. Referenced to the later of CASx or WEx in write operations 9. Either tRRH or tRCH must be satisfied for a read cycle. |
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