TNETA1570 datasheet(8/68 Pages) TI1

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

miscellaneous signals

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

PHY/ATM

(TTL)

PHY/ATM mode select. PHY/ATM selects ATM mode when low and the PHY mode when high.

ATM clock

ATMCLK

PHY mode

In PHY mode, the ATMCLK is driven low. It can be left as a N/C.

ATMCLK

(CMOS)

ATM mode

ATMCLK is used as the clock source to provide for data transfers/synchronization.

ATMCLK is connected to SEGCLK and RESCLK in the ATM mode. The clock

generated by the interface is 33 MHz (nominal) using the PCI clock.

62 − 65,

99 − 100

No connection. Leave open.

power and ground

TERMINAL

DESCRIPTION

NAME

NO.

DESCRIPTION

GND

8, 15, 24, 32, 40, 47, 56, 76, 88, 107, 117, 122, 128, 135, 140, 146, 151, 157, 163, 168, 174, 180,

186, 192, 198, 203, 210, 216, 223, 228, 234, 239

Ground

VCC

6, 17, 28, 38, 49, 60, 68, 93, 115, 125, 132, 143, 153, 161, 170, 178, 188, 196, 205, 213, 221, 230

Supply voltage

TNETA1570 Datasheet(PDF) 8 Page - Texas Instruments

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