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SST29EE020 Datasheet(PDF) 5 Page - Silicon Storage Technology, Inc

Part # SST29EE020
Description  2 Mbit (256K x8) Page-Mode EEPROM
PDF  26 Pages
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Manufacturer  SST [Silicon Storage Technology, Inc]
Direct Link  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST29EE020 Datasheet(HTML) 5 Page - Silicon Storage Technology, Inc

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Data Sheet
2 Mbit Page-Mode EEPROM
SST29EE020 / SST29LE020 / SST29VE020
5
©2001 Silicon Storage Technology, Inc.
S71062-06-000
6/01
307
FIGURE 2: PIN ASSIGNMENTS FOR 32-LEAD TSOP
FIGURE 3: PIN ASSIGNMENTS FOR 32-PIN PDIP
A11
A9
A8
A13
A14
A17
WE#
VDD
NC
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
307 ILL F01.2
Standard Pinout
Top View
Die Up
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-pin
PDIP
Top View
307 ILL F19.0
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
TABLE
2: PIN DESCRIPTION
Symbol
Pin Name
Functions
A17-A7
Row Address Inputs
To provide memory addresses. Row addresses define a page for a Write cycle.
A6-A0
Column Address Inputs
Column Addresses are toggled to load page data
DQ7-DQ0
Data Input/output
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
CE#
Chip Enable
To activate the device when CE# is low.
OE#
Output Enable
To gate the data output buffers.
WE#
Write Enable
To control the Write operations.
VDD
Power Supply
To provide:
5.0V supply (±10%) for SST29EE020
3.0V supply (3.0-3.6V) for SST29LE020
2.7V supply (2.7-3.6V) for SST29VE020
VSS
Ground
NC
No Connection
Unconnected pins.
T2.2 307



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