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SST48CF016 Datasheet(PDF) 30 Page - Silicon Storage Technology, Inc |
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SST48CF016 Datasheet(HTML) 30 Page - Silicon Storage Technology, Inc |
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30 / 60 page ![]() 30 Data Sheet CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256 ©2001 Silicon Storage Technology, Inc. S71125-03-000 9/01 375 3.0 SOFTWARE INTERFACE 3.1 CF-ATA Drive Register Set Definition and Protocol The CompactFlash card can be configured as a high performance I/O device through: 1. Standard PC-AT disk I/O address spaces 1F0H-1F7H, 3F6H-3F7H (primary); 170H-177H, 376H-377H (secondary) with IRQ 14 (or other available IRQ). 2. Any system decoded 16 Byte I/O block using any available IRQ. 3. Memory space. The communication to or from the CompactFlash card is done using the Task File registers which provide all the necessary registers for control and status information. The PCMCIA interface connects peripherals to the host using four register mapping methods. The following is a detailed description of these methods: 3.1.1 I/O Primary and Secondary Address Configurations Note: Address lines which are not indicated are ignored by the CompactFlash card for accessing all the registers in this table. TABLE 3-1: I/O CONFIGURATIONS Standard Configurations Config Index I/O or Memory Address Description 0 Memory 0H-FH, 400H-7FFH Memory Mapped 1 I/O XX0H-XXFH I/O Mapped 16 Contiguous Registers 2 I/O 1F0H-1F7H, 3F6H-3F7H Primary I/O Mapped 3 I/O 170H-177H, 376H-377H Secondary I/O Mapped T3-1.0 375 TABLE 3-2: PRIMARY AND SECONDARY I/O DECODING -REG A9-A4 A3 A2 A1 A0 -IORD=0 -IOWR=0 Note 0 1F(17) H 0 0 0 0 Even RD Data Even WR Data 1,2 1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don’t Care) as a word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers which lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the Even Byte of the word and the sec- ond byte accessed is the Odd Byte of the equivalent word access. 2. A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register. 0 1F(17)H 0 0 0 1 Error Register Features 1,2 0 1F(17)H 0 0 1 0 Sector Count Sector Count 0 1F(17)H 0 0 1 1 Sector No. Sector No. 0 1F(17)H 0 1 0 0 Cylinder Low Cylinder Low 0 1F(17)H 0 1 0 1 Cylinder High Cylinder High 0 1F(17)H 0 1 1 0 Select Card/Head Select Card/Head 0 1F(17)H 0 1 1 1 Status Command 0 3F(37)H 0 1 1 0 Alt Status Device Control 0 3F(37)H 0 1 1 1 Drive Address Reserved T3-2.1 375 |
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