5/19

Datasheet

Datasheet

BM6201FS

TSZ02201-0828AB400010-1-2

© 2012 ROHM Co., Ltd. All rights reserved.

26.MAR.2012 Rev.001

http://www.rohm.com

TSZ22111 · 15 · 001

FOB

VREG

FIB

BD6201XFS

BM6201FS

100k

C

6) Fault signal output

When the gate driver detects the either state that should be protected, voltage monitor (UVLO), overheating (TSD) or

overcurrent (OCP), the FOB pin outputs low (open drain). When these are detected with either of the gate driver chip

because the FOB pin is wired-OR connection with each phase gate driver chip internally, another phase also entering the

protection operation. Even when this function is not used, the FOB pin is pull-up to the voltage of 3V or more and at least

the resistor 10kΩ or more. Moreover, the signal from the outside of the chip is not passed built-in analog filter, but the

internal control signals (UVLO / TSD / OCP) passes the filter (2.0µs Min.) for the malfunction prevention by the switching

noise etc.

Fig.7 Fault signal bi-directional input pin interface

The release time of return from the protection operation can be change to insert the external capacitor. Refer to the

formula to the below. 2ms or more is recommended.

Fig.8 Release time setting application circuit

Fig.9 Release time (reference data @R=100kΩ)

When using controller BD6201X series as a control IC, since the external fault signal input pin of the side of the control

IC has the internal pull-up resistor, it can be directly linked with FOB pin. Refer to figure 10.

Fig.10 Interface equivalent circuit

2.0

t = - ln ( 1 -

VPU

) · R · C [s]

FOB

SHUTDOWN

TSD

OCP

UVLO

FILTER

FAULT

FOB

VPU

R

C

0

1

2

3

4

5

6

7

8

9

10

0.01

0.1

1

Capacitance: C [µF]

VPU = 15V

VPU = 5V