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ACX302 Datasheet(PDF) 4 Page - Sony Corporation |
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ACX302 Datasheet(HTML) 4 Page - Sony Corporation |
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4 / 24 page ![]() – 4 – ACX302AK ∗4 Input video and uniformity improvement signals should be symmetrical to VVC. The input conditions for the uniformity improvement signal Vpsig differ for 4:3 display and 16:9 display. 1) During 4:3 display, input the voltage amplitude symmetrical to VVC as shown in Fig. 1. 2) During 16:9 display, input the same signal amplitude as in 1) above during the effective display portion, and input the black signal level VpsigBK during the top/bottom black input portion as shown in Fig. 2. Item H/V driver input voltage (Low) (High) VIL VIH VREF VVC Vsig Vpsig VpsigBK Vcom –0.3 2.6 VIH/2 – 0.3 5.3 1.0 VVC ± 2.3 VVC – 0.4 0.0 3.0 VIH/2 5.5 VVC ± 4.0 VVC ± 2.5 VVC ± 4.0 VVC – 0.3 0.3 5.5 VIH/2 + 0.3 5.7 VVDD – 2.0 (however, 10V or less) VVC ± 2.7 VVC ± 4.5 VVC – 0.2 V V V V V V V V REF input voltage Video signal center voltage Video signal input range Uniformity improvement signal 16:9 display top/bottom black signal∗4 Common voltage of panel (Ta = 25°C) Symbol Min. Typ. Max. Unit 2. Input signal voltage conditions (Vss = 0V) During 4:3 display PSIG VVC Vpsig During 16:9 display PSIG VVC Vpsig VpsigBK VVC ± 4.0V VVC ± 2.5V Top/bottom black display portion (letterbox portion) Effective display portion Fig. 1 Fig. 2 |
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