– 21 –

CXA2153S

Description of Operation

1. Sharpness function

The RGB signals input to Pins 5, 7 and 10 are mixed at a ratio of 0.6G + 0.3R + 0.1B to form the Y signal. The

high-frequency component is removed from this Y signal by a differentiation circuit, and the amplitude is

controlled by a gain control circuit. The signal which undergoes gain control (sharpness component) has its

amplitude clipped by a limiter circuit and is then added to the R, G and B signals.

Limiter level = 30% (Typ.)

Section not sent to RGB output because of the limiter

∗ The output level when RIN = GIN = BIN = 0.7Vp-p

is set to 100%.

No sharpness component

10%

50ns

(T SW = 2)

100ns

(T SW = 3)

100%

100%

SHP GAIN = F (HEX)

SHP GAIN = 0 (HEX)

or SHP OFF = 1

25ns

(T SW = 1)

2. VBLK synchronous DAC refresh system

The VBLK signal is removed from the composite BLK signal which has been input to Pin 14, and the data for

microcomputer is timing-free. Set the width of the V blanking pulse which is input to Pin 14 to 300µs or more.

(See the next page)

3. Gamma correction function

Using the output obtained when 700mVp-p RGB signals are input as a reference (100 [IRE]), the ±9 [IRE]

(GAMMA1) and ±20 [IRE] (GAMMA2) waveforms can be corrected at the 15 [IRE] and 60 [IRE] inflection points,

respectively.

The polarity switching gain can be controlled separately for each point, enabling correction broken at two

+9 [IRE]

–9 [IRE]

15 [IRE]

100 [IRE]

100 [IRE]

GAMMA1

0

–20 [IRE]

+20 [IRE]

0

100 [IRE]

60 [IRE]

100 [IRE]

GAMMA2