Data Brief

For further information contact your local STMicroelectronics sales office.

June 2007

Rev 1

1/7

7

STA260

Sirius SDARS channel, service & source decoder

Features

and decoders

audio decoder

high-speed clock signals are derived using

on-chip PLL

audio sample rate (32K/48K Sample rates use

internal clocks, 44.1K Sample rate uses

external clock)

DAC

Sirius Standard Protocol (SSP) over RS-232

Analog to digital converters

76.5MHZ if signals conversion

Low power technology

Description

STA260 is a fully integrated 3rd generation

Baseband signal processor for Sirius Satellite

Digital Audio Radio Service (SDARS). It is

implemented using ST Micro's advanced 90 µm

CMOS090 technology.

It allows a highly efficient implementation of a

Sirius “SDARS Satellite Digital Audio Radio

Service” receiver when used with its companion

STA210 tuner ASIC.

STA260 is packaged in a Low profile Fine pitch

Ball Grid Array (LFBGA 15x15) and in Very thin

Fine pitch Ball Grid Array (VFBGA 8x8).

LFBGA289

VFBGA244

(15x15x1.4mm)

(8x8x1.0mm)

Table 1.

Device summary

1.

This device is Pb-Free ECOPACK® see Chapter 3: Package information.

Package

Packing

STA260

LFBGA289

Tray

STA260TR

LFBGA289

Tape & reel

STA260-8x8

VFBGA244

Tray

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