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M24128-DF Datasheet(PDF) 18 Page - STMicroelectronics

Part # M24128-DF
Description  128-Kbit serial I²C bus EEPROM
PDF  40 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24128-DF Datasheet(HTML) 18 Page - STMicroelectronics

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Instructions
M24128-BW M24128-BR M24128-BF M24128-DF
18/40
Doc ID 16892 Rev 21
5.1.5
ECC (Error Correction Code) and Write cycling
The Error Correction Code (ECC) is an internal logic function which is transparent for the
I2C communication protocol.
The ECC logic is implemented on each group of four EEPROM bytes(a). Inside a group, if a
single bit out of the four bytes happens to be erroneous during a Read operation, the ECC
detects this bit and replaces it with the correct value. The read reliability is therefore much
improved.
Even if the ECC function is performed on groups of four bytes, a single byte can be
written/cycled independently. In this case, the ECC function also writes/cycles the three
other bytes located in the same group(a). As a consequence, the maximum cycling budget is
defined at group level and the cycling can be distributed over the 4 bytes of the group: the
sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain
below the maximum value defined in Table 11: Cycling performance by groups of four bytes.
a.
A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an
integer.



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