PRELIMINARY TECHNICAL DATA

AD5280/AD5282

6

REV PrE 12 MAR 02

Information contained in this Product Concept Data Sheet describes a product in the early definition stage. There is no guarantee that the information contained here will become a final

product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara, CA. TEL 408 382-3107; FAX 408 382-2721; email; walt.heinzer@analog.com

SCL

SDA

1

9

1

0

1

1

0

AD0

AD1

R/

W

ACK. BY

AD5280

19

D7

D6

D5

D3

D4

D0

D1

D2

NO ACK.

BY MASTER

FRAME 1

Slave Address Byte

START BY

MASTER

FRAME 2

Data From Select ed

RDAC Regis ter

STO P BY

MASTER

Figure 3. Reading Data from a Previously Selected RDAC Register

OPERATION

The AD5280/AD5282 provides a single/dual channel, 256-

position digitally-controlled variable resistor (VR) device. The

terms VR and RDAC are used interchangeably throughout this

documentation. To program the VR settings, refer to the Digital

Interface section. Both parts have an internal power ON preset

that places the wiper in mid scale during power on, which

simplifies the fault condition recovery at power up. In addition,

the shutdown

SHDN pin of AD5280/AD5282 places the RDAC

in a zero power consumption state where terminal A is open

circuited and the wiper W is connected to terminal B, resulting

in only leakage currents being consumed in the VR structure. In

shutdown mode the VR latch settings are maintained, so that,

returning to operational mode from power shutdown, the VR

settings return to their previous resistance values.

RS

D5

D4

D3

D2

D1

D0

RDAC

LATCH

&

DECODER

SHDN

Ax

Bx

Wx

RS

RS

RS

D6

D7

Figure 4. AD5280/AD5282 Equivalent RDAC Circuit

PROGRAMMING THE VARIABLE RESISTOR

Rheostat Operation

The nominal resistance of the RDAC between terminals A and B

are available in 20K

Ω, 50KΩ, and 200KΩ. The final three

digits of the part number determine the nominal resistance

value, e.g. 20K

Ω = 20; 50KΩ = 50; 200KΩ = 200. The

accessed by the wiper terminal, plus the B terminal contact. The

eight bit data in the RDAC latch is decoded to select one of the

256 possible settings. Assume a 20K

Ω part is used, the wiper's

is a 60

Ω wiper contact resistance, such connection yields a

minimum of 60

Ω resistance between terminals W and B. The

second connection is the first tap point corresponds to 138

Ω

connection is the next tap point representing 216

Ω (78x2+60)

wiper up the resistor ladder until the last tap point is reached at

19982

Ω [R

AB

to the B terminal. See Figure 4 for a simplified diagram of the

equivalent RDAC circuit.

The general equation determining the digitally programmed

output resistance between W and B is:

1

eqn.

256

)

(

W

AB

WB

R

R

D

D

R

+

⋅

=

where D is the decimal equivalent of the binary code which is

to-end resistance.

Ω, when V

the following RDAC latch codes. Result will be the same if

terminal A is tied to W:

D

Output State

(DEC)

(

Ω)

256

19982

Ω Full-Scale (R

AB

128

10060

Ω Mid-Scale

1

138

Ω

1 LSB

0

60

Ω

Zero-Scale (Wiper contact resistance)

Note that in the zero-scale condition a finite wiper resistance of

60

Ω is present. Care should be taken to limit the current flow

between W and B in this state to a maximum current of no more

than 5mA. Otherwise, degradation or possible destruction of the

internal switch contact can occur.

Similar to the mechanical potentiometer, the resistance of the

RDAC between the wiper W and terminal A also produces a

used the B–terminal should be let open or tied to the wiper

maximum value of resistance and decreases as the data loaded in

the latch is increased in value. The general equation for this

operation is:

2

eqn.

256

256

)

(

W

AB

WA

R

R

D

D

R

+

⋅

−

=