AD5331 datasheet(16/20 Pages) AD

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AD5330/AD5331/AD5340/AD5341

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SUGGESTED DATABUS FORMATS

In most applications GAIN and BUF are hard-wired. However,

if more flexibility is required, they can be included in a databus.

This enables you to software program GAIN, giving the option

of doubling the resolution in the lower half of the DAC range.

In a bused system, GAIN and BUF may be treated as data inputs

since they are written to the device during a write operation and

take effect when

LDAC is taken low. This means that the refer-

ence buffers and the output amplifier gain of multiple DAC

devices can be controlled using common GAIN and BUF lines.

In the case of the AD5330 this means that the databus must be

wider than eight bits. The AD5331 and AD5340 databuses must

be at least 10 and 12 bits wide respectively and are best suited

to a 16-bit databus system.

Examples of data formats for putting GAIN and BUF on a 16-

bit databus are shown in Figure 31. Note that any unused bits

above the actual DAC data may be used for BUF and GAIN.

DAC devices can be controlled using common GAIN and

BUF lines.

AD5331

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

GAIN

BUF

AD5330

AD5340

X = UNUSED BIT

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

GAIN

BUF

DB9 DB8

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

GAIN

BUF

DB9 DB8

DB10

DB11

Figure 31. GAIN and BUF Data on a 16-Bit Bus

The AD5341 is a 12-bit device that uses byte load, so only four

bits of the high byte are actually used as data. Two of the unused

bits can be used for GAIN and BUF data by connecting them

to the GAIN and BUF inputs; e.g., Bits 6 and 7, as shown in

Figures 32 and 33.

DATA

INPUTS

BUF

GAIN

LDAC

CLR

HBEN

AD5341

DB7

DB6

8-BIT

DATA BUS

Figure 32. AD5341 Data Format for Byte Load with GAIN

and BUF Data on 8-Bit Bus

In this case, the low byte is written first in a write operation

with HBEN = 0. Bits 6 and 7 of DAC data will be written into

GAIN and BUF registers but will have no effect. The high byte

is then written. Only the lower four bits of data are written into the

DAC high byte register, so Bits 6 and 7 can be GAIN and BUF

data.

LDAC is used to update the DAC, GAIN and BUF values.

DB8

DB9

HIGH BYTE

LOW BYTE

X = UNUSED BIT

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

DB10

DB11

BUF GAIN

Figure 33. AD5341 with GAIN and BUF Data on 8-Bit Bus

APPLICATIONS INFORMATION

Typical Application Circuits

The AD5330/AD5331/AD5340/AD5341 can be used with a

wide range of reference voltages, especially if the reference inputs

are configured to be unbuffered, in which case the devices offer

full, one-quadrant multiplying capability over a reference range

of 0.25 V to VDD. More typically, these devices may be used with a

fixed, precision reference voltage. Figure 34 shows a typical

setup for the devices when using an external reference connected to

the unbuffered reference inputs. If the reference inputs are unbuf-

fered, the reference input range is from 0.25 V to VDD, but if the

on-chip reference buffers are used, the reference range is reduced.

Suitable references for 5 V operation are the AD780 and REF192.

For 2.5 V operation, a suitable external reference would be the

AD589, a 1.23 V bandgap reference.

AD5330/AD5331/

AD5340/AD5341

VOUT

0.1 F

VDD = 2.5V TO 5.5V

VDD

GND

AD780/REF192

WITH VDD = 5V

AD589 WITH VDD = 2.5V

VREF

GND

VOUT

VIN

EXT

REF

10 F

Figure 34. AD5330/AD5331/AD5340/AD5341 Using

External Reference

Driving VDD From the Reference Voltage

If an output range of zero to VDD is required, the simplest solu-

tion is to connect the reference inputs to VDD. As this supply may

not be very accurate, and may be noisy, the devices may be

powered from the reference voltage, for example using a 5 V

reference such as the ADM663 or ADM666, as shown in

Figure 35.

AD5330/AD5331/

AD5340/AD5341

VOUT

VDD

GND

VREF

GND

VOUT(2)

VIN

ADM663/ADM666

VSET

SHDN

SENSE

6V TO 16V

0.1 F

10 F

0.1 F

Figure 35. Using an ADM663/ADM666 as Power and Refer-

ence to AD5330/AD5331/AD5340/AD5341

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