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AT86RF233 Datasheet(PDF) 39 Page - ATMEL Corporation

Part # AT86RF233
Description  Low Power, 2.4GHz Transceiver for ZigBee, RF4CE, IEEE 802.15.4, 6LoWPAN, and ISM Applications
PDF  196 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT86RF233 Datasheet(HTML) 39 Page - ATMEL Corporation

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39
8351B–MCU Wireless–06/12
AT86RF233
7.1.4.5 BUSY_TX and RX_ON States
The transition from PLL_ON to BUSY_TX state and subsequently to RX_ON state is
shown in Figure 7-7.
Figure 7-7. PLL_ON to BUSY_TX to RX_ON Timing.
Time [µs]
0
x
16
x + 32
Time
tTR11
tTR10
Command
RX_ON
State
Block
PLL_ON
RX_ON
BUSY_TX
Pin
SLP_TR
PA
PLL
PA, TX
RX
PLL
or command TX_START
Starting from PLL_ON state it is further assumed that the PLL is already locked. A
transmission is initiated either by a rising edge of pin 11 (SLP_TR) or by command
TX_START, the Atmel AT86RF233 changes into BUSY_TX state.
The PLL settles to the transmit frequency and the PA is enabled. tTR10 = 16µs after
initiating the transmission starts the internally generated SHR transmission. After that
the PSDU data are transmitted from the Frame Buffer.
After completing the frame transmission, indicated by IRQ_3 (TRX_END), the PLL
settles back to the receive frequency within tTR11 = 32µs in state PLL_ON.
If during TX_BUSY the radio transmitter is programmed to change to a receive state it
automatically proceeds the state change to RX_ON state after finishing the
transmission.
7.1.4.6 Reset Procedure
The radio transceiver reset procedure is shown in Figure 7-8.
Figure 7-8. Reset Procedure.
x
Event
State
Block
Time [μs]
Pin /RST
TRX_OFF
x + 30
[IRQ_4 (AWAKE_END)]
0
various
Time
>t10
tTR13
>t11
XOSC, DVREG
XOSC, DVREG
x + 10
FTN
Note:
1.
Timing figure tTR13 refers to Table 7-1, t10, t11 refers to Section 12.4.



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