AD626

REV. C

–9–

10

90

100

0%

10

90

100

0%

10k

10k

10k

INPUT

20V p–p

1k

AD626

ERROR

OUT

2k

Figure 27. Settling Time Test Circuit

THEORY OF OPERATION

The AD626 is a differential amplifier consisting of a precision

balanced attenuator, a very low drift preamplifier (A1), and an

output buffer amplifier (A2). It has been designed so that small

differential signals can be accurately amplified and filtered in the

use of any other active components.

Figure 28 shows the main elements of the AD626. The signal

inputs at Pins 1 and 8 are first applied to dual resistive attenuators

R1 through R4 whose purpose is to reduce the peak common-

mode voltage at the input to the preamplifier—a feedback stage

based on the very low drift op amp A1. This allows the differen-

tial input voltage to be accurately amplified in the presence of

large common-mode voltages six times greater than that which

can be tolerated by the actual input to A1. As a result, the input

common-mode error is minimized by precise laser-trimming of

R3 and R4, thus giving the AD626 a common-mode rejection

ratio (CMRR) of at least 10,000:1 (80 dB).

To minimize the effect of spurious RF signals at the inputs due

to rectification at the input to A1, small filter capacitors C1 and

C2 are included.

AD626

C1

5pF

+IN

–IN

R1

200k

R2

200k

R3

41k

C2

5pF

R4

41k

R5

4.2k

R11

10k

R6

500

R7

500

R8

10k

R10

10k

R14

555

GND

GAIN = 100

R13

10k

R15

10k

R17

95k

R9

10k

R12

100k

FILTER

OUT

A1

A2

Figure 28. Simplified Schematic