REV. A

AD629

–10–

Error, ppm of FS

Error Source

AD629

INA117

AD629

INA117

°C

Initial Gain Error

(0.0005

(0.0005

500

500

Offset Voltage

(0.001 V

(0.002 V

100

200

DC CMR (Over Temperature)

(224

4,480

10,000

Total Accuracy Error:

5,080

10,700

TEMPERATURE DRIFT (85

°C)

Gain

10 ppm/

°C × 60°C

10 ppm/

°C × 60°C

600

600

Offset Voltage

(20

(40

120

240

Total Drift Error:

720

840

RESOLUTION

Noise, Typ, 0.01–10 Hz,

µV p-p

15

25

23

CMR, 60 Hz

(141

14

50

Nonlinearity

(10

–5

(10

–5

10

10

Total Resolution Error:

26

63

Total Error:

5,826

11,603

Output Current and Buffering

The AD629 is designed to drive loads of 2 k

Ω to within 2 V of

the rails, but can deliver higher output currents at lower output

voltages (see Figure 15). If higher output current is required,

the AD629’s output should be buffered with a precision op

amp such as the OP113 as shown in Figure 35. This op amp

can swing to within 1 V of either rail while driving a load as

small as 600

Ω.

REF(–)

–IN

+IN

NC

REF(+)

AD629

380k

380k

380k

20k

NC = NO CONNECT

0.1 F

8

7

6

5

1

2

3

4

0.1 F

0.1 F

0.1 F

OP113

21.1k

Figure 35. Output Buffering Application

A Gain of 19 Differential Amplifier

While low level signals can be connected directly to the –IN and

+IN inputs of the AD629, differential input signals can also be

connected as shown in Figure 36 to give a precise gain of 19.

However, large common-mode voltages are no longer permissible.

Cold junction compensation can be implemented using a tempera-

ture sensor such as the AD590.

REF(–)

–IN

+IN

NC

REF(+)

AD629

380k

380k

380k

20k

NC = NO CONNECT

0.1 F

8

7

6

5

1

2

3

4

THERMOCOUPLE

21.1k

Figure 36. A Gain of 19 Thermocouple Amplifier

Error Budget Analysis Example 1

In the dc application below, the 10 A output current from a

device with a high common-mode voltage (such as a power sup-

ply or current-mode amplifier) is sensed across a 1

Ω shunt

resistor (Figure 37). The common-mode voltage is 200 V, and

the resistor terminals are connected through a long pair of lead

wires located in a high-noise environment, for example, 50 Hz/

60 Hz 440 V ac power lines. The calculations in Table III

assume an induced noise level of 1 V at 60 Hz on the leads, in

addition to a full-scale dc differential voltage of 10 V. The error

budget table quantifies the contribution of each error source.

Note that the dominant error source in this example is due to

the dc common-mode voltage.