PCA9509P datasheet(8/23 Pages) NXP

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PCA9509P

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Product data sheet

Rev. 1 — 14 August 2012

8 of 23

NXP Semiconductors

PCA9509P

Low power level translating I2C-bus/SMBus repeater

Application design-in information

A typical application is shown in Figure 4. In this example, the CPU is running on a 0.9 V

I2C-bus while the slave is connected to a 3.3 V bus. Both buses run at 400 kHz. Master

devices can be placed on either bus.

When port B of the PCA9509P is pulled LOW by a driver on the I2C-bus, a CMOS

hysteresis input detects the falling edge when it goes below 0.3VCC(B) and causes the

internal driver on port A to turn on, causing port A to pull down to about 0.2VCC(A). When

port A of the PCA9509P falls, a comparator detects the falling edge when it falls below

0.15VCC(A) and causes the internal driver on port B to turn on and pull the port B pin down

to ground. In order to illustrate what would be seen in a typical application, refer to

Figure 5 and Figure 6. If the bus master in Figure 4 were to write to the slave through the

PCA9509P, waveforms shown in Figure 5 would be observed on the B bus. This looks

like a normal I2C-bus transmission.

On the A bus side of the PCA9509P, the clock and data lines would have a positive offset

from ground equal to the VOL of the PCA9509P. After the 8th clock pulse, the data line will

be pulled to the VOL of the master device, which is very close to ground in this example. At

the end of the acknowledge, the level rises only to the LOW level set by the driver in the

PCA9509P for a short delay while the B bus side rises above 0.5VCC(B), then it continues

HIGH. It is important to note that any arbitration or clock stretching events require that the

LOW level on the A bus side at the input of the PCA9509P (VIL) is below 0.1VCC(A) to be

recognized by the PCA9509P and then transmitted to the B bus side.

Fig 4.

Typical application

Fig 5.

Bus B SMBus/I2C-bus waveform

002aag176

VCC(B)

VCC(A)

PCA9509P

10 kΩ

SDA

SCL

MASTER

CPU

SLAVE

400 kHz

SDA

SCL

bus A

bus B

3.3 V

0.9 V

10 kΩ

0.9 V

002aab644

9th clock pulse

acknowledge

SCL

SDA

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