AD7677AST datasheet(14/20 Pages) AD

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REV. 0

AD7677

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Voltage Reference Input

The AD7677 uses an external 2.5 V voltage reference. The

voltage reference input REF of the AD7677 has a dynamic

input impedance. Therefore, it should be driven by a low

impedance source with an efficient decoupling between REF

and REFGND inputs. This decoupling depends on the choice

of the voltage reference, but usually consists of a 1

µF ceramic

capacitor and a low ESR tantalum capacitor connected to the

REF and REFGND inputs with minimum parasitic inductance.

µF is an appropriate value for the tantalum capacitor when

used with one of the recommended reference voltages:

• The lownoise, low temperature drift ADR421 and AD780

voltage references

• The lowpower ADR291 voltage reference

• The lowcost AD1582 voltage reference

For applications using multiple AD7677s, it is more effective

to buffer the reference voltage with a lownoise, very stable op

amp like the AD8031.

Care should also be taken with the reference temperature coeffi-

cient of the voltage reference which directly affects the full-scale

accuracy if this parameter matters. For instance, a

±15 ppm/°C

tempco of the reference changes the full scale by

±1 LSB/°C.

Note that VREF , as mentioned in the specification table, could be

increased to AVDD – 1.85 V. Since the input range is defined

in terms of VREF, this would essentially increase the range to

make it a

±3 V input range with a reference voltage of 3 V. One

of the benefits here is the increased SNR obtained as a result of

this increase. The theoretical improvement as a result of this

increase in reference is 1.58 dB (20 log [3/2.5]). Due to the

theoretical quantization noise however, the observed improve-

ment is approximately 1 dB. The AD780 can be selected with a

3 V reference voltage.

FREQUENCY – Hz

10k

10M

100k

Figure 9. PSRR vs. Frequency

Power Supply

The AD7677 uses three sets of power supply pins: an analog

5 V supply AVDD, a digital 5 V core supply DVDD, and a

digital input/output interface supply OVDD. The OVDD supply

allows direct interface with any logic working between 2.7 V and

5.25 V. To reduce the number of supplies needed, the digital

core (DVDD) can be supplied through a simple RC filter from

the analog supply as shown in Figure 5. The AD7677 is inde-

pendent of power supply sequencing and thus free from supply

voltage induced latchup. Additionally, it is very insensitive to

power supply variations over a wide frequency range as shown

in Figure 9.

POWER DISSIPATION

In Impulse mode, the AD7677 automatically reduces its power

consumption at the end of each conversion phase. During the

acquisition phase, the operating currents are very low which

allows a significant power saving when the conversion rate is

reduced as shown in Figure 10. This feature makes the AD7677

ideal for very low-power battery applications.

It should be noted that the digital interface remains active even

during the acquisition phase. To reduce the operating digital

supply currents even further, the digital inputs need to be driven

close to the power rails (i.e., DVDD and DGND) and OVDD

should not exceed DVDD by more than 0.3 V.

SAMPLING RATE – SPS

0.1

10k

100

100k

10k

100

100k

WARP/NORMAL

IMPULSE

Figure 10. Power Dissipation vs. Sample Rate

CONVERSION CONTROL

Figure 11 shows the detailed timing diagrams of the conversion

process. The AD7677 is controlled by the signal

CNVST which

initiates conversion. Once initiated, it cannot be restarted or

aborted, even by the power-down input PD, until the conver-

sion is complete. The

CNVST signal operates independently of

CS and RD signals.

In Impulse mode, conversions can be automatically initiated. If

CNVST is held low when BUSY is low, the AD7677 controls

the acquisition phase and then automatically initiates a new

conversion. By keeping

CNVST low, the AD7677 keeps the

conversion process running by itself. It should be noted that the

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