REV. A

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a

AD8074/AD8075

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2001

500 MHz, G = +1 and +2 Triple

Video Buffers with Disable

FUNCTIONAL BLOCK DIAGRAM

OE

DGND

IN2

AGND

IN1

AGND

IN0

OUT2

OUT1

OUT0

AD8074 /AD8075

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

G =

+1/+2

G =

+1/+2

G =

+1/+2

FEATURES

Dual Supply

5 V

High-Speed Fully Buffered Inputs and Outputs

600 MHz Bandwidth (–3 dB) 200 mV p-p

500 MHz Bandwidth (–3 dB) 2 V p-p

1600 V/ s Slew Rate, G = +1

1350 V/ s Slew Rate, G = +2

Fast Settling Time: 4 ns

Low Supply Current: < 30 mA

):

Gain Flatness of 0.1 dB to 50 MHz

0.01% Differential Gain Error

0.01 Differential Phase Error

“All Hostile“ Crosstalk

–80 dB @ 10 MHz

–50 dB @ 100 MHz

High “OFF” Isolation of 90 dB @ 10 MHz

Low Cost

Fast Output Disable Feature

APPLICATIONS

RGB Buffer in LCD and Plasma Displays

RGB Driver

Video Routers

PRODUCT DESCRIPTION

The AD8074/AD8075 are high-speed triple video buffers with

G = +1 and +2 respectively. They have a –3 dB full signal band-

width in excess of 450 MHz, along with slew rates in excess of

1400 V/

µs. With better than –80 dB of all hostile crosstalk and

90 dB isolation, they are useful in many high-speed applica-

tions. The differential gain and differential phase error are 0.01%

and 0.01

°. Gain flatness of 0.1 dB up to 50 MHz makes the

AD8074/AD8075 ideal for RGB buffering or driving. They

consume less than 30 mA on a

± 5 V supply.

Both devices offer a high-speed disable feature that allows the

outputs to be put into a high impedance state. This allows the

building of larger input arrays while minimizing “OFF” chan-

nel output loading. The AD8074/AD8075 are offered in a

16-lead TSSOP package.

Table I. Truth Table

OE

OUT0, 1, 2

0

IN0, IN1, IN2

1

High Z