AD9750-EB datasheet(16/22 Pages) AD

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AD9750

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All analog ground pins of the DAC, reference and other analog

components should be tied directly to the analog ground plane.

The two ground planes should be connected by a path 1/8

to 1/4 inch wide underneath or within 1/2 inch of the DAC to

maintain optimum performance. Care should be taken to ensure

that the ground plane is uninterrupted over crucial signal paths.

On the digital side, this includes the digital input lines running

to the DAC as well as any clock signals. On the analog side, this

includes the DAC output signal, reference signal and the supply

feeders.

The use of wide runs or planes in the routing of power lines is

also recommended. This serves the dual role of providing a low

series impedance power supply to the part, as well as providing

some “free” capacitive decoupling to the appropriate ground

plane. It is essential that care be taken in the layout of signal and

power ground interconnects to avoid inducing extraneous volt-

age drops in the signal ground paths. It is recommended that all

connections be short, direct and as physically close to the pack-

age as possible in order to minimize the sharing of conduction

paths between different currents. When runs exceed an inch in

length, strip line techniques with proper termination resistor

should be considered. The necessity and value of this resistor

will be dependent upon the logic family used.

For a more detailed discussion of the implementation and

construction of high speed, mixed signal printed circuit boards,

refer to Analog Devices’ application notes AN-280 and

AN-333.

APPLICATIONS

Using the AD9750 for Quadrature Amplitude Modulation

(QAM)

QAM is one of the most widely used digital modulation schemes in

digital communication systems. This modulation technique can

be found in FDM as well as spreadspectrum (i.e., CDMA)

based systems. A QAM signal is a carrier frequency that is

modulated in both amplitude (i.e., AM modulation) and phase

(i.e., PM modulation). It can be generated by independently

modulating two carriers of identical frequency but with a 90

phase difference. This results in an in-phase (I) carrier compo-

nent and a quadrature (Q) carrier component at a 90

° phase

shift with respect to the I component. The I and Q components

are then summed to provide a QAM signal at the specified

carrier frequency.

A common and traditional implementation of a QAM modu-

lator is shown in Figure 35. The modulation is performed in the

analog domain in which two DACs are used to generate the

baseband I and Q components, respectively. Each component is

then typically applied to a Nyquist filter before being applied to

a quadrature mixer. The matching Nyquist filters shape and

limit each component’s spectral envelope while minimizing

intersymbol interference. The DAC is typically updated at the

QAM symbol rate or possibly a multiple of it if an interpolating

filter precedes the DAC. The use of an interpolating filter typi-

cally eases the implementation and complexity of the analog

filter, which can be a significant contributor to mismatches in

gain and phase between the two baseband channels. A quadra-

ture mixer modulates the I and Q components with in-phase

and quadrature phase carrier frequency and then sums the two

outputs to provide the QAM signal.

AD9750

CARRIER

FREQUENCY

MIXER

DSP

ASIC

NYQUIST

FILTERS

QUADRATURE

MODULATOR

Figure 35. Typical Analog QAM Architecture

In this implementation, it is much more difficult to maintain

proper gain and phase matching between the I and Q channels.

The circuit implementation shown in Figure 36 helps improve

upon the matching and temperature stability characteristics

between the I and Q channels, as well as showing a path for up-

conversion using the AD8346 quadrature modulator. Using a

single voltage reference derived from U1 to set the gain for both

the I and Q channels will improve the gain matching and stabil-

ity. RCAL can be used to compensate for any mismatch in gain

between the two channels. This mismatch may be attributed to

the mismatch between RSET1 and RSET2, effective load resistance

of each channel, and/or the voltage offset of the control ampli-

fier in each DAC. The differential voltage outputs of U1 and

U2 are fed into the respective differential inputs of the AD8346

via matching networks.

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