STM32F407IG datasheet(178/180 Pages) STMICROELECTRONICS

178 / 180 page

Revision history

STM32F405xx, STM32F407xx

178/180

Doc ID 022152 Rev 3

31-May-2012

Updated Figure 5: STM32F40x block diagram and Figure 7: Regulator

ON/internal reset OFF

Added SDIO, added notes related to FSMC and SPI/I2S in Table 2:

STM32F405xx and STM32F407xx: features and peripheral counts.

Starting from Silicon revision Z, USB OTG full-speed interface is now

available for all STM32F405xx devices.

Added full information on WLCSP90 package together with

corresponding part numbers.

Changed number of AHB buses to 3.

Modified available Flash memory sizes in Section 2.2.4: Embedded

Flash memory.

Modified number of maskable interrupt channels in Section 2.2.10:

Nested vectored interrupt controller (NVIC).

Updated case of Regulator ON/internal reset ON, Regulator

ON/internal reset OFF, and Regulator OFF/internal reset ON in

Section 2.2.16: Voltage regulator.

Updated standby mode description in Section 2.2.18: Low-power

modes.

Added Note 1 below Figure 14: STM32F40x UFBGA176 ballout.

Added Note 1 below Figure 15: STM32F40x WLCSP90 ballout.

Updated Table 6: STM32F40x pin and ball definitions.

Added Table 7: FSMC pin definition.

Removed OTG_HS_INTN alternate function in Table 6: STM32F40x

pin and ball definitions and Table 8: Alternate function mapping.

Removed I2S2_WS on PB6/AF5 in Table 8: Alternate function

mapping.

Replaced JTRST by NJTRST, removed ETH_RMII _TX_CLK, and

modified I2S3ext_SD on PC11 in Table 8: Alternate function mapping.

Table 8: Alternate function mapping.

Added Table 9: STM32F40x register boundary addresses.

Updated Figure 16: STM32F40x memory map.

Updated VDDA and VREF+ decoupling capacitor in Figure 19: Power

supply scheme.

Added power dissipation maximum value for WLCSP90 in Table 13:

General operating conditions.

Updated VPOR/PDR in Table 18: Embedded reset and power control

block characteristics.

Updated notes in Table 19: Typical and maximum current consumption

in Run mode, code with data processing running from Flash memory

(ART accelerator disabled), Table 20: Typical and maximum current

consumption in Run mode, code with data processing running from

Flash memory (ART accelerator enabled) or RAM, and Table 21:

Typical and maximum current consumption in Sleep mode.

Updated maximum current consumption at TA = 25 °n Table 22:

Typical and maximum current consumptions in Stop mode.

Table 97.

Document revision history (continued)

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STM32F407IG Datasheet(PDF) 178 Page - STMicroelectronics

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