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STM32F407IG Datasheet(PDF) 26 Page - STMicroelectronics |
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STM32F407IG Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 180 page  Description STM32F405xx, STM32F407xx 26/180 Doc ID 022152 Rev 3 allows to supply externally a 1.2 V voltage source through VCAP_1 and VCAP_2 pins, in addition to VDD. The following conditions must be respected: –VDD should always be higher than VCAP_1 and VCAP_2 to avoid current injection between power domains. – PA0 should be kept low to cover both conditions: until VCAP_1 and VCAP_2 reach 1.08 V and until VDD reaches 1.8 V (see Figure 8). – NRST should be controlled by an external reset controller to keep the device under reset when VDD is below 1.8 V (see Figure 9). Figure 8. Startup in regulator OFF mode: slow VDD slope - power-down reset risen after VCAP_1/VCAP_2 stabilization 1. This figure is valid both whatever the internal reset mode (on or off). Figure 9. Startup in regulator OFF mode: fast VDD slope - power-down reset risen before VCAP_1/VCAP_2 stabilization 1. This figure is valid both whatever the internal reset mode (on or off). |
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