REV. A

ADP3154

–10–

would be especially noticeable under very light or very heavy

loads where the voltage is “positioned” near one of the extremes

of the regulation window rather than near the nominal center

value. It must be noted and understood that this low gain char-

acteristic (i.e., loose dc load regulation) is inherently required to

allow improved transient containment (i.e., to achieve tighter ac

load regulation). That is, the dc load regulation is intentionally

sacrificed (but kept within specification) in order to minimize

the number of capacitors required to contain the load transients

produced by the CPU.

Linear Regulator

The ADP3154 linear regulator provides a low cost, convenient

and versatile solution for generating additional lower supply rails

that can be programmed in the range 1.2 V–5 V. The maximum

output load current is determined by the size and thermal

impedance of the external N-channel power MOSFET that is

placed in series with the supply and controlled by the ADP3154.

pin of the ADP3154 and compared to an internal 1.2 V refer-

ence in a negative feedback loop which keeps the output voltage

in regulation. If the load is being reduced or increased, the FET

drive will also be reduced or increased by the ADP3154 to pro-

vide a well regulated

±1% accurate output voltage. The output

voltage is programmed by adjusting the value of the external

1.1

470pF

2N2222

IRLR2703

2k

1000 F/10V

VLDO

ADP3154

FB

20k

35k

Figure 14. Linear Regulator with Overcurrent Protection

Efficiency of the Linear Regulator

The efficiency and corresponding power dissipation of the linear

regulator are not determined by the ADP3154. Rather, these

are a function of input and output voltage and load current.

Efficiency is approximated by the formula:

η = 100% × (V

OUT

The corresponding power dissipation in the MOSFET, together

with any resistance added in series from input to output is given

by:

× I

OUT(LDO)

Minimum power dissipation and maximum efficiency are ac-

complished by choosing the lowest available input voltage that

exceeds the desired output voltage. However, if the chosen

input source is itself generated by a linear regulator, its power

dissipation will be increased in proportion to the additional

current it must now provide. For most PC systems, the lowest

available input source for the linear regulators which is not itself

generated by a linear regulator is 3.3 V from the main power

supply.

V

R

Rt

VV

Rt

k

V

Rt

k

RI

OS

C

TOTAL

OUT OS

TOTAL

TOTAL

CS OMAX

=×

+























 +

















08

136

17

275

6

.

.

–.

()

ΩΩ

(2)

of a resistor and capacitor. The required resistor value can be

calculated from the equation:

R

kRt

kRt

C

TOTAL

TOTAL

=

×

275

275

Ω

Ω –

where

Rt

kR

I

VV

TOTAL

CS

OMAX

HI

LO

=

××

16 4

.

–

Ω

and where the quantities 16.4 k

Ω and 275 kΩ are characteristics

has already been determined as above.

the proper voltage positioning gain, the dc biasing of that resis-

tor would determine how the regulation band is centered (i.e.,

offset). Note that sometimes the specified regulation band is

asymmetrical with respect to the nominal VID voltage. With the

ADP3154, the offset is already considered part of the design

procedure—no special provision is required. To accomplish the

amplifier output, with the lower resistor tied to ground and the

upper resistor to the 12 V supply of the IC. The values of these

resistors can be calculated using:

RR

V

V

UPPER

C

DIV

OS

=×

and

RR

V

VV

LOWER

C

OS

DIV

OS

=×

–

from the nominal VID-programmed value to the center of the

specified regulation window for the output voltage. (Note this

may be either positive or negative.) For clarification, that offset

is given by:

V

V

V

VID

OUT OS

HI

LO

()

()–

=+

1

2

allowed for regulation.

Finally, the compensating capacitance is determined from the

equality of the pole frequency of the error amplifier gain and the

zero frequency of the impedance of the output capacitor:

C

C

ESR

Rt

COMP

O

TOTAL

=

×

Trade-Offs Between DC Load Regulation and AC Load

Regulation

Casual observation of the circuit operation—e.g., with a voltmeter

—would make it appear that the dc load regulation appears

to be rather poor compared to a conventional regulator. This